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AMDGPU: Set CodePointerSize to 8 for amdgcn
llvm-svn: 300470
1 parent 18c18de commit 1209684

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3 files changed

+76
-2
lines changed

3 files changed

+76
-2
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‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp

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Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@
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using namespace llvm;
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AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT) : MCAsmInfoELF() {
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CodePointerSize = (TT.getArch() == Triple::amdgcn) ? 8 : 4;
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HasSingleParameterDotFile = false;
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//===------------------------------------------------------------------===//
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MinInstAlignment = 4;

‎llvm/test/DebugInfo/AMDGPU/code-pointer-size.ll

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@@ -0,0 +1,73 @@
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; RUN: llc -O0 -mtriple=amdgcn--amdhsa -mcpu=fiji -filetype=obj < %s | llvm-dwarfdump -debug-dump=info - | FileCheck %s
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; LLVM IR generated with the following command and OpenCL source:
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;
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; $clang -cl-std=CL2.0 -g -O0 -target amdgcn-amd-amdhsa -S -emit-llvm <path-to-file>
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;
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; kernel void kernel1(global int *A) {
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; *A = 11;
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; }
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;
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; kernel void kernel2(global int *B) {
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; *B = 12;
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; }
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; Make sure that code pointer size is 8 bytes:
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; CHECK: .debug_info contents:
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; CHECK: addr_size = 0x08
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declare void @llvm.dbg.declare(metadata, metadata, metadata)
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define amdgpu_kernel void @kernel1(i32 addrspace(1)* %A) !dbg !7 {
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entry:
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%A.addr = alloca i32 addrspace(1)*, align 4
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store i32 addrspace(1)* %A, i32 addrspace(1)** %A.addr, align 4
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call void @llvm.dbg.declare(metadata i32 addrspace(1)** %A.addr, metadata !16, metadata !17), !dbg !18
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%0 = load i32 addrspace(1)*, i32 addrspace(1)** %A.addr, align 4, !dbg !19
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store i32 11, i32 addrspace(1)* %0, align 4, !dbg !20
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ret void, !dbg !21
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}
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define amdgpu_kernel void @kernel2(i32 addrspace(1)* %B) !dbg !22 {
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entry:
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%B.addr = alloca i32 addrspace(1)*, align 4
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store i32 addrspace(1)* %B, i32 addrspace(1)** %B.addr, align 4
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call void @llvm.dbg.declare(metadata i32 addrspace(1)** %B.addr, metadata !23, metadata !17), !dbg !24
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%0 = load i32 addrspace(1)*, i32 addrspace(1)** %B.addr, align 4, !dbg !25
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store i32 12, i32 addrspace(1)* %0, align 4, !dbg !26
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ret void, !dbg !27
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}
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!llvm.dbg.cu = !{!0}
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!opencl.ocl.version = !{!3, !3}
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!llvm.module.flags = !{!4, !5}
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!llvm.ident = !{!6}
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!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
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!1 = !DIFile(filename: "dwarfdump-relocs.cl", directory: "/some/random/directory")
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!2 = !{}
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!3 = !{i32 2, i32 0}
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!4 = !{i32 2, !"Dwarf Version", i32 2}
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!5 = !{i32 2, !"Debug Info Version", i32 3}
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!6 = !{!""}
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!7 = distinct !DISubprogram(name: "kernel1", scope: !1, file: !1, line: 1, type: !8, isLocal: false, isDefinition: true, scopeLine: 1, flags: DIFlagPrototyped, isOptimized: false, unit: !0, variables: !2)
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!8 = !DISubroutineType(types: !9)
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!9 = !{null, !10}
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!10 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !11, size: 64)
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!11 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
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!12 = !{i32 1}
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!13 = !{!"none"}
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!14 = !{!"int*"}
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!15 = !{!""}
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!16 = !DILocalVariable(name: "A", arg: 1, scope: !7, file: !1, line: 1, type: !10)
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!17 = !DIExpression(DW_OP_constu, 1, DW_OP_swap, DW_OP_xderef)
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!18 = !DILocation(line: 1, column: 33, scope: !7)
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!19 = !DILocation(line: 2, column: 4, scope: !7)
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!20 = !DILocation(line: 2, column: 6, scope: !7)
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!21 = !DILocation(line: 3, column: 1, scope: !7)
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!22 = distinct !DISubprogram(name: "kernel2", scope: !1, file: !1, line: 5, type: !8, isLocal: false, isDefinition: true, scopeLine: 5, flags: DIFlagPrototyped, isOptimized: false, unit: !0, variables: !2)
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!23 = !DILocalVariable(name: "B", arg: 1, scope: !22, file: !1, line: 5, type: !10)
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!24 = !DILocation(line: 5, column: 33, scope: !22)
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!25 = !DILocation(line: 6, column: 4, scope: !22)
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!26 = !DILocation(line: 6, column: 6, scope: !22)
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!27 = !DILocation(line: 7, column: 1, scope: !22)

‎llvm/test/DebugInfo/AMDGPU/variable-locations.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ declare void @llvm.dbg.declare(metadata, metadata, metadata)
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; CHECK-NEXT: DW_AT_external
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; CHECK-NEXT: DW_AT_decl_file
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; CHECK-NEXT: DW_AT_decl_line
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; CHECK-NEXT: DW_AT_location [DW_FORM_block1] (<0x05> 03 00 00 00 00 )
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; CHECK-NEXT: DW_AT_location [DW_FORM_block1] (<0x09> 03 00 00 00 00 00 00 00 00 )
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@GlobA = common addrspace(1) global i32 0, align 4, !dbg !0
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; CHECK: {{.*}}DW_TAG_variable
@@ -28,7 +28,7 @@ declare void @llvm.dbg.declare(metadata, metadata, metadata)
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; CHECK-NEXT: DW_AT_external
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; CHECK-NEXT: DW_AT_decl_file
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; CHECK-NEXT: DW_AT_decl_line
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; CHECK-NEXT: DW_AT_location [DW_FORM_block1] (<0x05> 03 00 00 00 00 )
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; CHECK-NEXT: DW_AT_location [DW_FORM_block1] (<0x09> 03 00 00 00 00 00 00 00 00 )
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@GlobB = common addrspace(1) global i32 0, align 4, !dbg !6
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define amdgpu_kernel void @kernel1(

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