Skip to content

Commit 98fd32c

Browse files
oohalmpe
authored andcommitted
powernv/eeh: Use generic code to handle hot resets
When we reset PCI devices managed by a hotplug driver the reset may generate spurious hotplug events that cause the PCI device we're resetting to be torn down accidently. This is a problem for EEH (when the driver is EEH aware) since we want to leave the OS PCI device state intact so that the device can be re-set without losing any resources (network, disks, etc) provided by the driver. Generic PCI code provides the pci_bus_error_reset() function to handle resetting a PCI Device (or bus) by using the reset method provided by the hotplug slot driver. We can use this function if the EEH core has requested a hot reset (common case) without tripping over the hotplug driver. Signed-off-by: Oliver O'Halloran <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://lore.kernel.org/r/[email protected]
1 parent 5055453 commit 98fd32c

File tree

1 file changed

+35
-3
lines changed

1 file changed

+35
-3
lines changed

arch/powerpc/platforms/powernv/eeh-powernv.c

Lines changed: 35 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,7 @@
3434

3535
#include "powernv.h"
3636
#include "pci.h"
37+
#include "../../../../drivers/pci/pci.h"
3738

3839
static int eeh_event_irq = -EINVAL;
3940

@@ -849,7 +850,7 @@ static int __pnv_eeh_bridge_reset(struct pci_dev *dev, int option)
849850
int aer = edev ? edev->aer_cap : 0;
850851
u32 ctrl;
851852

852-
pr_debug("%s: Reset PCI bus %04x:%02x with option %d\n",
853+
pr_debug("%s: Secondary Reset PCI bus %04x:%02x with option %d\n",
853854
__func__, pci_domain_nr(dev->bus),
854855
dev->bus->number, option);
855856

@@ -907,6 +908,10 @@ static int pnv_eeh_bridge_reset(struct pci_dev *pdev, int option)
907908
if (!dn || !of_get_property(dn, "ibm,reset-by-firmware", NULL))
908909
return __pnv_eeh_bridge_reset(pdev, option);
909910

911+
pr_debug("%s: FW reset PCI bus %04x:%02x with option %d\n",
912+
__func__, pci_domain_nr(pdev->bus),
913+
pdev->bus->number, option);
914+
910915
switch (option) {
911916
case EEH_RESET_FUNDAMENTAL:
912917
scope = OPAL_RESET_PCI_FUNDAMENTAL;
@@ -1125,10 +1130,37 @@ static int pnv_eeh_reset(struct eeh_pe *pe, int option)
11251130
return -EIO;
11261131
}
11271132

1128-
if (pci_is_root_bus(bus) ||
1129-
pci_is_root_bus(bus->parent))
1133+
if (pci_is_root_bus(bus))
11301134
return pnv_eeh_root_reset(hose, option);
11311135

1136+
/*
1137+
* For hot resets try use the generic PCI error recovery reset
1138+
* functions. These correctly handles the case where the secondary
1139+
* bus is behind a hotplug slot and it will use the slot provided
1140+
* reset methods to prevent spurious hotplug events during the reset.
1141+
*
1142+
* Fundemental resets need to be handled internally to EEH since the
1143+
* PCI core doesn't really have a concept of a fundemental reset,
1144+
* mainly because there's no standard way to generate one. Only a
1145+
* few devices require an FRESET so it should be fine.
1146+
*/
1147+
if (option != EEH_RESET_FUNDAMENTAL) {
1148+
/*
1149+
* NB: Skiboot and pnv_eeh_bridge_reset() also no-op the
1150+
* de-assert step. It's like the OPAL reset API was
1151+
* poorly designed or something...
1152+
*/
1153+
if (option == EEH_RESET_DEACTIVATE)
1154+
return 0;
1155+
1156+
rc = pci_bus_error_reset(bus->self);
1157+
if (!rc)
1158+
return 0;
1159+
}
1160+
1161+
/* otherwise, use the generic bridge reset. this might call into FW */
1162+
if (pci_is_root_bus(bus->parent))
1163+
return pnv_eeh_root_reset(hose, option);
11321164
return pnv_eeh_bridge_reset(bus->self, option);
11331165
}
11341166

0 commit comments

Comments
 (0)