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Sudarsana Reddy Kallurudavem330
Sudarsana Reddy Kalluru
authored and
davem330
committed
qed*: Add support for ethtool link_ksettings callbacks.
This patch adds the driver implementation for ethtool link_ksettings callbacks. qed driver now defines/uses the qed specific masks for representing link capability values. qede driver maps these values to to new link modes defined by the kernel implementation of link_ksettings. Please consider applying this to 'net-next' branch. Signed-off-by: Sudarsana Reddy Kalluru <[email protected]> Signed-off-by: Yuval Mintz <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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+180
-84
lines changed

5 files changed

+180
-84
lines changed

‎drivers/net/ethernet/qlogic/qed/qed_main.c

Lines changed: 56 additions & 51 deletions
Original file line numberDiff line numberDiff line change
@@ -1025,20 +1025,23 @@ static int qed_set_link(struct qed_dev *cdev, struct qed_link_params *params)
10251025
link_params->speed.autoneg = params->autoneg;
10261026
if (params->override_flags & QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS) {
10271027
link_params->speed.advertised_speeds = 0;
1028-
if ((params->adv_speeds & SUPPORTED_1000baseT_Half) ||
1029-
(params->adv_speeds & SUPPORTED_1000baseT_Full))
1028+
if ((params->adv_speeds & QED_LM_1000baseT_Half_BIT) ||
1029+
(params->adv_speeds & QED_LM_1000baseT_Full_BIT))
10301030
link_params->speed.advertised_speeds |=
1031-
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G;
1032-
if (params->adv_speeds & SUPPORTED_10000baseKR_Full)
1031+
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G;
1032+
if (params->adv_speeds & QED_LM_10000baseKR_Full_BIT)
10331033
link_params->speed.advertised_speeds |=
1034-
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G;
1035-
if (params->adv_speeds & SUPPORTED_40000baseLR4_Full)
1034+
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G;
1035+
if (params->adv_speeds & QED_LM_25000baseKR_Full_BIT)
10361036
link_params->speed.advertised_speeds |=
1037-
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G;
1038-
if (params->adv_speeds & 0)
1037+
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_25G;
1038+
if (params->adv_speeds & QED_LM_40000baseLR4_Full_BIT)
10391039
link_params->speed.advertised_speeds |=
1040-
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G;
1041-
if (params->adv_speeds & 0)
1040+
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G;
1041+
if (params->adv_speeds & QED_LM_50000baseKR2_Full_BIT)
1042+
link_params->speed.advertised_speeds |=
1043+
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G;
1044+
if (params->adv_speeds & QED_LM_100000baseKR4_Full_BIT)
10421045
link_params->speed.advertised_speeds |=
10431046
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_BB_100G;
10441047
}
@@ -1168,50 +1171,56 @@ static void qed_fill_link(struct qed_hwfn *hwfn,
11681171
if_link->link_up = true;
11691172

11701173
/* TODO - at the moment assume supported and advertised speed equal */
1171-
if_link->supported_caps = SUPPORTED_FIBRE;
1174+
if_link->supported_caps = QED_LM_FIBRE_BIT;
11721175
if (params.speed.autoneg)
1173-
if_link->supported_caps |= SUPPORTED_Autoneg;
1176+
if_link->supported_caps |= QED_LM_Autoneg_BIT;
11741177
if (params.pause.autoneg ||
11751178
(params.pause.forced_rx && params.pause.forced_tx))
1176-
if_link->supported_caps |= SUPPORTED_Asym_Pause;
1179+
if_link->supported_caps |= QED_LM_Asym_Pause_BIT;
11771180
if (params.pause.autoneg || params.pause.forced_rx ||
11781181
params.pause.forced_tx)
1179-
if_link->supported_caps |= SUPPORTED_Pause;
1182+
if_link->supported_caps |= QED_LM_Pause_BIT;
11801183

11811184
if_link->advertised_caps = if_link->supported_caps;
11821185
if (params.speed.advertised_speeds &
11831186
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G)
1184-
if_link->advertised_caps |= SUPPORTED_1000baseT_Half |
1185-
SUPPORTED_1000baseT_Full;
1187+
if_link->advertised_caps |= QED_LM_1000baseT_Half_BIT |
1188+
QED_LM_1000baseT_Full_BIT;
11861189
if (params.speed.advertised_speeds &
11871190
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G)
1188-
if_link->advertised_caps |= SUPPORTED_10000baseKR_Full;
1191+
if_link->advertised_caps |= QED_LM_10000baseKR_Full_BIT;
1192+
if (params.speed.advertised_speeds &
1193+
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_25G)
1194+
if_link->advertised_caps |= QED_LM_25000baseKR_Full_BIT;
11891195
if (params.speed.advertised_speeds &
1190-
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G)
1191-
if_link->advertised_caps |= SUPPORTED_40000baseLR4_Full;
1196+
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G)
1197+
if_link->advertised_caps |= QED_LM_40000baseLR4_Full_BIT;
11921198
if (params.speed.advertised_speeds &
1193-
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G)
1194-
if_link->advertised_caps |= 0;
1199+
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G)
1200+
if_link->advertised_caps |= QED_LM_50000baseKR2_Full_BIT;
11951201
if (params.speed.advertised_speeds &
11961202
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_BB_100G)
1197-
if_link->advertised_caps |= 0;
1203+
if_link->advertised_caps |= QED_LM_100000baseKR4_Full_BIT;
11981204

11991205
if (link_caps.speed_capabilities &
12001206
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G)
1201-
if_link->supported_caps |= SUPPORTED_1000baseT_Half |
1202-
SUPPORTED_1000baseT_Full;
1207+
if_link->supported_caps |= QED_LM_1000baseT_Half_BIT |
1208+
QED_LM_1000baseT_Full_BIT;
12031209
if (link_caps.speed_capabilities &
12041210
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G)
1205-
if_link->supported_caps |= SUPPORTED_10000baseKR_Full;
1211+
if_link->supported_caps |= QED_LM_10000baseKR_Full_BIT;
1212+
if (link_caps.speed_capabilities &
1213+
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_25G)
1214+
if_link->supported_caps |= QED_LM_25000baseKR_Full_BIT;
12061215
if (link_caps.speed_capabilities &
1207-
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G)
1208-
if_link->supported_caps |= SUPPORTED_40000baseLR4_Full;
1216+
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G)
1217+
if_link->supported_caps |= QED_LM_40000baseLR4_Full_BIT;
12091218
if (link_caps.speed_capabilities &
1210-
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G)
1211-
if_link->supported_caps |= 0;
1219+
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G)
1220+
if_link->supported_caps |= QED_LM_50000baseKR2_Full_BIT;
12121221
if (link_caps.speed_capabilities &
12131222
NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_BB_100G)
1214-
if_link->supported_caps |= 0;
1223+
if_link->supported_caps |= QED_LM_100000baseKR4_Full_BIT;
12151224

12161225
if (link.link_up)
12171226
if_link->speed = link.speed;
@@ -1231,33 +1240,29 @@ static void qed_fill_link(struct qed_hwfn *hwfn,
12311240
if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE;
12321241

12331242
/* Link partner capabilities */
1234-
if (link.partner_adv_speed &
1235-
QED_LINK_PARTNER_SPEED_1G_HD)
1236-
if_link->lp_caps |= SUPPORTED_1000baseT_Half;
1237-
if (link.partner_adv_speed &
1238-
QED_LINK_PARTNER_SPEED_1G_FD)
1239-
if_link->lp_caps |= SUPPORTED_1000baseT_Full;
1240-
if (link.partner_adv_speed &
1241-
QED_LINK_PARTNER_SPEED_10G)
1242-
if_link->lp_caps |= SUPPORTED_10000baseKR_Full;
1243-
if (link.partner_adv_speed &
1244-
QED_LINK_PARTNER_SPEED_40G)
1245-
if_link->lp_caps |= SUPPORTED_40000baseLR4_Full;
1246-
if (link.partner_adv_speed &
1247-
QED_LINK_PARTNER_SPEED_50G)
1248-
if_link->lp_caps |= 0;
1249-
if (link.partner_adv_speed &
1250-
QED_LINK_PARTNER_SPEED_100G)
1251-
if_link->lp_caps |= 0;
1243+
if (link.partner_adv_speed & QED_LINK_PARTNER_SPEED_1G_HD)
1244+
if_link->lp_caps |= QED_LM_1000baseT_Half_BIT;
1245+
if (link.partner_adv_speed & QED_LINK_PARTNER_SPEED_1G_FD)
1246+
if_link->lp_caps |= QED_LM_1000baseT_Full_BIT;
1247+
if (link.partner_adv_speed & QED_LINK_PARTNER_SPEED_10G)
1248+
if_link->lp_caps |= QED_LM_10000baseKR_Full_BIT;
1249+
if (link.partner_adv_speed & QED_LINK_PARTNER_SPEED_25G)
1250+
if_link->lp_caps |= QED_LM_25000baseKR_Full_BIT;
1251+
if (link.partner_adv_speed & QED_LINK_PARTNER_SPEED_40G)
1252+
if_link->lp_caps |= QED_LM_40000baseLR4_Full_BIT;
1253+
if (link.partner_adv_speed & QED_LINK_PARTNER_SPEED_50G)
1254+
if_link->lp_caps |= QED_LM_50000baseKR2_Full_BIT;
1255+
if (link.partner_adv_speed & QED_LINK_PARTNER_SPEED_100G)
1256+
if_link->lp_caps |= QED_LM_100000baseKR4_Full_BIT;
12521257

12531258
if (link.an_complete)
1254-
if_link->lp_caps |= SUPPORTED_Autoneg;
1259+
if_link->lp_caps |= QED_LM_Autoneg_BIT;
12551260

12561261
if (link.partner_adv_pause)
1257-
if_link->lp_caps |= SUPPORTED_Pause;
1262+
if_link->lp_caps |= QED_LM_Pause_BIT;
12581263
if (link.partner_adv_pause == QED_LINK_PARTNER_ASYMMETRIC_PAUSE ||
12591264
link.partner_adv_pause == QED_LINK_PARTNER_BOTH_PAUSE)
1260-
if_link->lp_caps |= SUPPORTED_Asym_Pause;
1265+
if_link->lp_caps |= QED_LM_Asym_Pause_BIT;
12611266
}
12621267

12631268
static void qed_get_current_link(struct qed_dev *cdev,

‎drivers/net/ethernet/qlogic/qed/qed_mcp.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -634,6 +634,9 @@ static void qed_mcp_handle_link_change(struct qed_hwfn *p_hwfn,
634634
p_link->partner_adv_speed |=
635635
(status & LINK_STATUS_LINK_PARTNER_20G_CAPABLE) ?
636636
QED_LINK_PARTNER_SPEED_20G : 0;
637+
p_link->partner_adv_speed |=
638+
(status & LINK_STATUS_LINK_PARTNER_25G_CAPABLE) ?
639+
QED_LINK_PARTNER_SPEED_25G : 0;
637640
p_link->partner_adv_speed |=
638641
(status & LINK_STATUS_LINK_PARTNER_40G_CAPABLE) ?
639642
QED_LINK_PARTNER_SPEED_40G : 0;

‎drivers/net/ethernet/qlogic/qed/qed_mcp.h

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -60,9 +60,10 @@ struct qed_mcp_link_state {
6060
#define QED_LINK_PARTNER_SPEED_1G_FD BIT(1)
6161
#define QED_LINK_PARTNER_SPEED_10G BIT(2)
6262
#define QED_LINK_PARTNER_SPEED_20G BIT(3)
63-
#define QED_LINK_PARTNER_SPEED_40G BIT(4)
64-
#define QED_LINK_PARTNER_SPEED_50G BIT(5)
65-
#define QED_LINK_PARTNER_SPEED_100G BIT(6)
63+
#define QED_LINK_PARTNER_SPEED_25G BIT(4)
64+
#define QED_LINK_PARTNER_SPEED_40G BIT(5)
65+
#define QED_LINK_PARTNER_SPEED_50G BIT(6)
66+
#define QED_LINK_PARTNER_SPEED_100G BIT(7)
6667
u32 partner_adv_speed;
6768

6869
bool partner_tx_flow_ctrl_en;

‎drivers/net/ethernet/qlogic/qede/qede_ethtool.c

Lines changed: 102 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -249,78 +249,150 @@ static u32 qede_get_priv_flags(struct net_device *dev)
249249
return (!!(edev->dev_info.common.num_hwfns > 1)) << QEDE_PRI_FLAG_CMT;
250250
}
251251

252-
static int qede_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
252+
struct qede_link_mode_mapping {
253+
u32 qed_link_mode;
254+
u32 ethtool_link_mode;
255+
};
256+
257+
static const struct qede_link_mode_mapping qed_lm_map[] = {
258+
{QED_LM_FIBRE_BIT, ETHTOOL_LINK_MODE_FIBRE_BIT},
259+
{QED_LM_Autoneg_BIT, ETHTOOL_LINK_MODE_Autoneg_BIT},
260+
{QED_LM_Asym_Pause_BIT, ETHTOOL_LINK_MODE_Asym_Pause_BIT},
261+
{QED_LM_Pause_BIT, ETHTOOL_LINK_MODE_Pause_BIT},
262+
{QED_LM_1000baseT_Half_BIT, ETHTOOL_LINK_MODE_1000baseT_Half_BIT},
263+
{QED_LM_1000baseT_Full_BIT, ETHTOOL_LINK_MODE_1000baseT_Full_BIT},
264+
{QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT},
265+
{QED_LM_25000baseKR_Full_BIT, ETHTOOL_LINK_MODE_25000baseKR_Full_BIT},
266+
{QED_LM_40000baseLR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT},
267+
{QED_LM_50000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT},
268+
{QED_LM_100000baseKR4_Full_BIT,
269+
ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT},
270+
};
271+
272+
#define QEDE_DRV_TO_ETHTOOL_CAPS(caps, lk_ksettings, name) \
273+
{ \
274+
int i; \
275+
\
276+
for (i = 0; i < QED_LM_COUNT; i++) { \
277+
if ((caps) & (qed_lm_map[i].qed_link_mode)) \
278+
__set_bit(qed_lm_map[i].ethtool_link_mode,\
279+
lk_ksettings->link_modes.name); \
280+
} \
281+
}
282+
283+
#define QEDE_ETHTOOL_TO_DRV_CAPS(caps, lk_ksettings, name) \
284+
{ \
285+
int i; \
286+
\
287+
for (i = 0; i < QED_LM_COUNT; i++) { \
288+
if (test_bit(qed_lm_map[i].ethtool_link_mode, \
289+
lk_ksettings->link_modes.name)) \
290+
caps |= qed_lm_map[i].qed_link_mode; \
291+
} \
292+
}
293+
294+
static int qede_get_link_ksettings(struct net_device *dev,
295+
struct ethtool_link_ksettings *cmd)
253296
{
297+
struct ethtool_link_settings *base = &cmd->base;
254298
struct qede_dev *edev = netdev_priv(dev);
255299
struct qed_link_output current_link;
256300

257301
memset(&current_link, 0, sizeof(current_link));
258302
edev->ops->common->get_link(edev->cdev, &current_link);
259303

260-
cmd->supported = current_link.supported_caps;
261-
cmd->advertising = current_link.advertised_caps;
304+
ethtool_link_ksettings_zero_link_mode(cmd, supported);
305+
QEDE_DRV_TO_ETHTOOL_CAPS(current_link.supported_caps, cmd, supported)
306+
307+
ethtool_link_ksettings_zero_link_mode(cmd, advertising);
308+
QEDE_DRV_TO_ETHTOOL_CAPS(current_link.advertised_caps, cmd, advertising)
309+
310+
ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
311+
QEDE_DRV_TO_ETHTOOL_CAPS(current_link.lp_caps, cmd, lp_advertising)
312+
262313
if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) {
263-
ethtool_cmd_speed_set(cmd, current_link.speed);
264-
cmd->duplex = current_link.duplex;
314+
base->speed = current_link.speed;
315+
base->duplex = current_link.duplex;
265316
} else {
266-
cmd->duplex = DUPLEX_UNKNOWN;
267-
ethtool_cmd_speed_set(cmd, SPEED_UNKNOWN);
317+
base->speed = SPEED_UNKNOWN;
318+
base->duplex = DUPLEX_UNKNOWN;
268319
}
269-
cmd->port = current_link.port;
270-
cmd->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE :
271-
AUTONEG_DISABLE;
272-
cmd->lp_advertising = current_link.lp_caps;
320+
base->port = current_link.port;
321+
base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE :
322+
AUTONEG_DISABLE;
273323

274324
return 0;
275325
}
276326

277-
static int qede_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
327+
static int qede_set_link_ksettings(struct net_device *dev,
328+
const struct ethtool_link_ksettings *cmd)
278329
{
330+
const struct ethtool_link_settings *base = &cmd->base;
279331
struct qede_dev *edev = netdev_priv(dev);
280332
struct qed_link_output current_link;
281333
struct qed_link_params params;
282-
u32 speed;
283334

284335
if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
285-
DP_INFO(edev,
286-
"Link settings are not allowed to be changed\n");
336+
DP_INFO(edev, "Link settings are not allowed to be changed\n");
287337
return -EOPNOTSUPP;
288338
}
289-
290339
memset(&current_link, 0, sizeof(current_link));
291340
memset(&params, 0, sizeof(params));
292341
edev->ops->common->get_link(edev->cdev, &current_link);
293342

294-
speed = ethtool_cmd_speed(cmd);
295343
params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS;
296344
params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG;
297-
if (cmd->autoneg == AUTONEG_ENABLE) {
345+
if (base->autoneg == AUTONEG_ENABLE) {
298346
params.autoneg = true;
299347
params.forced_speed = 0;
300-
params.adv_speeds = cmd->advertising;
301-
} else { /* forced speed */
348+
QEDE_ETHTOOL_TO_DRV_CAPS(params.adv_speeds, cmd, advertising)
349+
} else { /* forced speed */
302350
params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED;
303351
params.autoneg = false;
304-
params.forced_speed = speed;
305-
switch (speed) {
352+
params.forced_speed = base->speed;
353+
switch (base->speed) {
306354
case SPEED_10000:
307355
if (!(current_link.supported_caps &
308-
SUPPORTED_10000baseKR_Full)) {
356+
QED_LM_10000baseKR_Full_BIT)) {
309357
DP_INFO(edev, "10G speed not supported\n");
310358
return -EINVAL;
311359
}
312-
params.adv_speeds = SUPPORTED_10000baseKR_Full;
360+
params.adv_speeds = QED_LM_10000baseKR_Full_BIT;
361+
break;
362+
case SPEED_25000:
363+
if (!(current_link.supported_caps &
364+
QED_LM_25000baseKR_Full_BIT)) {
365+
DP_INFO(edev, "25G speed not supported\n");
366+
return -EINVAL;
367+
}
368+
params.adv_speeds = QED_LM_25000baseKR_Full_BIT;
313369
break;
314370
case SPEED_40000:
315371
if (!(current_link.supported_caps &
316-
SUPPORTED_40000baseLR4_Full)) {
372+
QED_LM_40000baseLR4_Full_BIT)) {
317373
DP_INFO(edev, "40G speed not supported\n");
318374
return -EINVAL;
319375
}
320-
params.adv_speeds = SUPPORTED_40000baseLR4_Full;
376+
params.adv_speeds = QED_LM_40000baseLR4_Full_BIT;
377+
break;
378+
case 0xdead:
379+
if (!(current_link.supported_caps &
380+
QED_LM_50000baseKR2_Full_BIT)) {
381+
DP_INFO(edev, "50G speed not supported\n");
382+
return -EINVAL;
383+
}
384+
params.adv_speeds = QED_LM_50000baseKR2_Full_BIT;
385+
break;
386+
case 0xbeef:
387+
if (!(current_link.supported_caps &
388+
QED_LM_100000baseKR4_Full_BIT)) {
389+
DP_INFO(edev, "100G speed not supported\n");
390+
return -EINVAL;
391+
}
392+
params.adv_speeds = QED_LM_100000baseKR4_Full_BIT;
321393
break;
322394
default:
323-
DP_INFO(edev, "Unsupported speed %u\n", speed);
395+
DP_INFO(edev, "Unsupported speed %u\n", base->speed);
324396
return -EINVAL;
325397
}
326398
}
@@ -1228,8 +1300,8 @@ static int qede_get_tunable(struct net_device *dev,
12281300
}
12291301

12301302
static const struct ethtool_ops qede_ethtool_ops = {
1231-
.get_settings = qede_get_settings,
1232-
.set_settings = qede_set_settings,
1303+
.get_link_ksettings = qede_get_link_ksettings,
1304+
.set_link_ksettings = qede_set_link_ksettings,
12331305
.get_drvinfo = qede_get_drvinfo,
12341306
.get_msglevel = qede_get_msglevel,
12351307
.set_msglevel = qede_set_msglevel,
@@ -1260,7 +1332,7 @@ static const struct ethtool_ops qede_ethtool_ops = {
12601332
};
12611333

12621334
static const struct ethtool_ops qede_vf_ethtool_ops = {
1263-
.get_settings = qede_get_settings,
1335+
.get_link_ksettings = qede_get_link_ksettings,
12641336
.get_drvinfo = qede_get_drvinfo,
12651337
.get_msglevel = qede_get_msglevel,
12661338
.set_msglevel = qede_set_msglevel,

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