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torvaldstorvalds
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Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late DT updates from Arnd Bergmann: "This is a collection of a few late fixes and other misc stuff that had dependencies on things being merged from other trees. The Renesas R-Car power domain handling, and the Nvidia Tegra USB support both hand notable changes that required changing the DT binding in a way that only provides compatibility with old DT blobs on new kernels but not vice versa. As a consequence, the DT changes are based on top of the driver changes and are now in this branch. For NXP i.MX and Samsung Exynos, the changes in here depend on other changes that got merged through the clk maintainer tree" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (35 commits) ARM: dts: exynos: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos542x SoC ARM: dts: exynos: Add NoC Probe dt node for Exynos542x SoC ARM: dts: exynos: Add support of bus frequency for exynos4412-trats/odroidu3 ARM: dts: exynos: Expand the voltage range of buck1/3 regulator for exynos4412-odroidu3 ARM: dts: exynos: Add support of bus frequency using VDD_INT for exynos3250-rinato ARM: dts: exynos: Add exynos4412-ppmu-common dtsi to delete duplicate PPMU nodes ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4210 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos4x12 ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4x12 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos3250 ARM: dts: exynos: Add DMC bus frequency for exynos3250-rinato/monk ARM: dts: exynos: Add DMC bus node for Exynos3250 ARM: tegra: Enable XUSB on Nyan ARM: tegra: Enable XUSB on Jetson TK1 ARM: tegra: Enable XUSB on Venice2 ARM: tegra: Add Tegra124 XUSB controller ARM: tegra: Move Tegra124 to the new XUSB pad controller binding ARM: dts: r8a7794: Use SYSC "always-on" PM Domain ARM: dts: r8a7793: Use SYSC "always-on" PM Domain ...
2 parents d04f90f + 88f1847 commit 08344f3

26 files changed

+2918
-497
lines changed

‎arch/arm/boot/dts/Makefile

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -399,6 +399,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
399399
imx6ul-tx6ul-mainboard.dtb
400400
dtb-$(CONFIG_SOC_IMX7D) += \
401401
imx7d-cl-som-imx7.dtb \
402+
imx7d-nitrogen7.dtb \
402403
imx7d-sbc-imx7.dtb \
403404
imx7d-sdb.dtb
404405
dtb-$(CONFIG_SOC_LS1021A) += \

‎arch/arm/boot/dts/exynos3250-monk.dts

Lines changed: 7 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@
1414

1515
/dts-v1/;
1616
#include "exynos3250.dtsi"
17+
#include "exynos4412-ppmu-common.dtsi"
1718
#include <dt-bindings/input/input.h>
1819
#include <dt-bindings/gpio/gpio.h>
1920
#include <dt-bindings/clock/samsung,s2mps11.h>
@@ -156,6 +157,12 @@
156157
};
157158
};
158159

160+
&bus_dmc {
161+
devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
162+
vdd-supply = <&buck1_reg>;
163+
status = "okay";
164+
};
165+
159166
&cpu0 {
160167
cpu0-supply = <&buck2_reg>;
161168
};
@@ -458,46 +465,6 @@
458465
status = "okay";
459466
};
460467

461-
&ppmu_dmc0 {
462-
status = "okay";
463-
464-
events {
465-
ppmu_dmc0_3: ppmu-event3-dmc0 {
466-
event-name = "ppmu-event3-dmc0";
467-
};
468-
};
469-
};
470-
471-
&ppmu_dmc1 {
472-
status = "okay";
473-
474-
events {
475-
ppmu_dmc1_3: ppmu-event3-dmc1 {
476-
event-name = "ppmu-event3-dmc1";
477-
};
478-
};
479-
};
480-
481-
&ppmu_leftbus {
482-
status = "okay";
483-
484-
events {
485-
ppmu_leftbus_3: ppmu-event3-leftbus {
486-
event-name = "ppmu-event3-leftbus";
487-
};
488-
};
489-
};
490-
491-
&ppmu_rightbus {
492-
status = "okay";
493-
494-
events {
495-
ppmu_rightbus_3: ppmu-event3-rightbus {
496-
event-name = "ppmu-event3-rightbus";
497-
};
498-
};
499-
};
500-
501468
&xusbxti {
502469
clock-frequency = <24000000>;
503470
};

‎arch/arm/boot/dts/exynos3250-rinato.dts

Lines changed: 48 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@
1414

1515
/dts-v1/;
1616
#include "exynos3250.dtsi"
17+
#include "exynos4412-ppmu-common.dtsi"
1718
#include <dt-bindings/input/input.h>
1819
#include <dt-bindings/gpio/gpio.h>
1920
#include <dt-bindings/clock/samsung,s2mps11.h>
@@ -147,6 +148,53 @@
147148
};
148149
};
149150

151+
&bus_dmc {
152+
devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
153+
vdd-supply = <&buck1_reg>;
154+
status = "okay";
155+
};
156+
157+
&bus_leftbus {
158+
devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
159+
vdd-supply = <&buck3_reg>;
160+
status = "okay";
161+
};
162+
163+
&bus_rightbus {
164+
devfreq = <&bus_leftbus>;
165+
status = "okay";
166+
};
167+
168+
&bus_lcd0 {
169+
devfreq = <&bus_leftbus>;
170+
status = "okay";
171+
};
172+
173+
&bus_fsys {
174+
devfreq = <&bus_leftbus>;
175+
status = "okay";
176+
};
177+
178+
&bus_mcuisp {
179+
devfreq = <&bus_leftbus>;
180+
status = "okay";
181+
};
182+
183+
&bus_isp {
184+
devfreq = <&bus_leftbus>;
185+
status = "okay";
186+
};
187+
188+
&bus_peril {
189+
devfreq = <&bus_leftbus>;
190+
status = "okay";
191+
};
192+
193+
&bus_mfc {
194+
devfreq = <&bus_leftbus>;
195+
status = "okay";
196+
};
197+
150198
&cpu0 {
151199
cpu0-supply = <&buck2_reg>;
152200
};
@@ -635,46 +683,6 @@
635683
status = "okay";
636684
};
637685

638-
&ppmu_dmc0 {
639-
status = "okay";
640-
641-
events {
642-
ppmu_dmc0_3: ppmu-event3-dmc0 {
643-
event-name = "ppmu-event3-dmc0";
644-
};
645-
};
646-
};
647-
648-
&ppmu_dmc1 {
649-
status = "okay";
650-
651-
events {
652-
ppmu_dmc1_3: ppmu-event3-dmc1 {
653-
event-name = "ppmu-event3-dmc1";
654-
};
655-
};
656-
};
657-
658-
&ppmu_leftbus {
659-
status = "okay";
660-
661-
events {
662-
ppmu_leftbus_3: ppmu-event3-leftbus {
663-
event-name = "ppmu-event3-leftbus";
664-
};
665-
};
666-
};
667-
668-
&ppmu_rightbus {
669-
status = "okay";
670-
671-
events {
672-
ppmu_rightbus_3: ppmu-event3-rightbus {
673-
event-name = "ppmu-event3-rightbus";
674-
};
675-
};
676-
};
677-
678686
&xusbxti {
679687
clock-frequency = <24000000>;
680688
};

‎arch/arm/boot/dts/exynos3250.dtsi

Lines changed: 181 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -713,6 +713,187 @@
713713
clock-names = "ppmu";
714714
status = "disabled";
715715
};
716+
717+
bus_dmc: bus_dmc {
718+
compatible = "samsung,exynos-bus";
719+
clocks = <&cmu_dmc CLK_DIV_DMC>;
720+
clock-names = "bus";
721+
operating-points-v2 = <&bus_dmc_opp_table>;
722+
status = "disabled";
723+
};
724+
725+
bus_dmc_opp_table: opp_table1 {
726+
compatible = "operating-points-v2";
727+
opp-shared;
728+
729+
opp@50000000 {
730+
opp-hz = /bits/ 64 <50000000>;
731+
opp-microvolt = <800000>;
732+
};
733+
opp@100000000 {
734+
opp-hz = /bits/ 64 <100000000>;
735+
opp-microvolt = <800000>;
736+
};
737+
opp@134000000 {
738+
opp-hz = /bits/ 64 <134000000>;
739+
opp-microvolt = <800000>;
740+
};
741+
opp@200000000 {
742+
opp-hz = /bits/ 64 <200000000>;
743+
opp-microvolt = <825000>;
744+
};
745+
opp@400000000 {
746+
opp-hz = /bits/ 64 <400000000>;
747+
opp-microvolt = <875000>;
748+
};
749+
};
750+
751+
bus_leftbus: bus_leftbus {
752+
compatible = "samsung,exynos-bus";
753+
clocks = <&cmu CLK_DIV_GDL>;
754+
clock-names = "bus";
755+
operating-points-v2 = <&bus_leftbus_opp_table>;
756+
status = "disabled";
757+
};
758+
759+
bus_rightbus: bus_rightbus {
760+
compatible = "samsung,exynos-bus";
761+
clocks = <&cmu CLK_DIV_GDR>;
762+
clock-names = "bus";
763+
operating-points-v2 = <&bus_leftbus_opp_table>;
764+
status = "disabled";
765+
};
766+
767+
bus_lcd0: bus_lcd0 {
768+
compatible = "samsung,exynos-bus";
769+
clocks = <&cmu CLK_DIV_ACLK_160>;
770+
clock-names = "bus";
771+
operating-points-v2 = <&bus_leftbus_opp_table>;
772+
status = "disabled";
773+
};
774+
775+
bus_fsys: bus_fsys {
776+
compatible = "samsung,exynos-bus";
777+
clocks = <&cmu CLK_DIV_ACLK_200>;
778+
clock-names = "bus";
779+
operating-points-v2 = <&bus_leftbus_opp_table>;
780+
status = "disabled";
781+
};
782+
783+
bus_mcuisp: bus_mcuisp {
784+
compatible = "samsung,exynos-bus";
785+
clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>;
786+
clock-names = "bus";
787+
operating-points-v2 = <&bus_mcuisp_opp_table>;
788+
status = "disabled";
789+
};
790+
791+
bus_isp: bus_isp {
792+
compatible = "samsung,exynos-bus";
793+
clocks = <&cmu CLK_DIV_ACLK_266>;
794+
clock-names = "bus";
795+
operating-points-v2 = <&bus_isp_opp_table>;
796+
status = "disabled";
797+
};
798+
799+
bus_peril: bus_peril {
800+
compatible = "samsung,exynos-bus";
801+
clocks = <&cmu CLK_DIV_ACLK_100>;
802+
clock-names = "bus";
803+
operating-points-v2 = <&bus_peril_opp_table>;
804+
status = "disabled";
805+
};
806+
807+
bus_mfc: bus_mfc {
808+
compatible = "samsung,exynos-bus";
809+
clocks = <&cmu CLK_SCLK_MFC>;
810+
clock-names = "bus";
811+
operating-points-v2 = <&bus_leftbus_opp_table>;
812+
status = "disabled";
813+
};
814+
815+
bus_leftbus_opp_table: opp_table2 {
816+
compatible = "operating-points-v2";
817+
opp-shared;
818+
819+
opp@50000000 {
820+
opp-hz = /bits/ 64 <50000000>;
821+
opp-microvolt = <900000>;
822+
};
823+
opp@80000000 {
824+
opp-hz = /bits/ 64 <80000000>;
825+
opp-microvolt = <900000>;
826+
};
827+
opp@100000000 {
828+
opp-hz = /bits/ 64 <100000000>;
829+
opp-microvolt = <1000000>;
830+
};
831+
opp@134000000 {
832+
opp-hz = /bits/ 64 <134000000>;
833+
opp-microvolt = <1000000>;
834+
};
835+
opp@200000000 {
836+
opp-hz = /bits/ 64 <200000000>;
837+
opp-microvolt = <1000000>;
838+
};
839+
};
840+
841+
bus_mcuisp_opp_table: opp_table3 {
842+
compatible = "operating-points-v2";
843+
opp-shared;
844+
845+
opp@50000000 {
846+
opp-hz = /bits/ 64 <50000000>;
847+
};
848+
opp@80000000 {
849+
opp-hz = /bits/ 64 <80000000>;
850+
};
851+
opp@100000000 {
852+
opp-hz = /bits/ 64 <100000000>;
853+
};
854+
opp@200000000 {
855+
opp-hz = /bits/ 64 <200000000>;
856+
};
857+
opp@400000000 {
858+
opp-hz = /bits/ 64 <400000000>;
859+
};
860+
};
861+
862+
bus_isp_opp_table: opp_table4 {
863+
compatible = "operating-points-v2";
864+
opp-shared;
865+
866+
opp@50000000 {
867+
opp-hz = /bits/ 64 <50000000>;
868+
};
869+
opp@80000000 {
870+
opp-hz = /bits/ 64 <80000000>;
871+
};
872+
opp@100000000 {
873+
opp-hz = /bits/ 64 <100000000>;
874+
};
875+
opp@200000000 {
876+
opp-hz = /bits/ 64 <200000000>;
877+
};
878+
opp@300000000 {
879+
opp-hz = /bits/ 64 <300000000>;
880+
};
881+
};
882+
883+
bus_peril_opp_table: opp_table5 {
884+
compatible = "operating-points-v2";
885+
opp-shared;
886+
887+
opp@50000000 {
888+
opp-hz = /bits/ 64 <50000000>;
889+
};
890+
opp@80000000 {
891+
opp-hz = /bits/ 64 <80000000>;
892+
};
893+
opp@100000000 {
894+
opp-hz = /bits/ 64 <100000000>;
895+
};
896+
};
716897
};
717898
};
718899

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