Merge tag 'mtd/for-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux

Pull MTD updates from Miquel Raynal:
 "MTD changes:

   - There's been no major core change, just a bunch of driver related
     improvements.

     Amongst them the conversion to of_property_present() for
     non-boolean properties, the addition of the support for Fujitsu
     MB85RS128TY FRAM, a couple of improvements to the phram driver and
     the usual load of misc changes.

  Raw NAND changes:

   - A new controller driver, from Nuvoton, has been merged

   - Bastien Curutchet has contributed a series improving the Davinci
     controller driver, both on the organization of the code, but also
     on the performance side. The binding has also been converted to
     yaml, received a new OOB layout and now supports on-die ECC engines

   - The Qualcomm controller driver has been deeply cleaned to extract
     some parts of the code into a shared file with the Qualcomm SPI
     memory controller

   - Aside from these main changes, the Cadence binding has been
     converted to yaml, the brcmnand controller driver has received a
     small fix, otherwise some more minor changes have also made their
     way in

  SPI NAND changes:

   - The SPI NAND subsystem has seen a great improvement, with the
     advent of DTR operations (DDR operations, which may be extended to
     the address cycles). The first vendor driver to benefit from these
     improvements is the Winbond driver

   - A new manufacturer driver is added SkyHigh, with a new constraint
     for the core, it is impossible to disable the on-die ECC engine

   - A Foresee device is also now supported

  SPI NOR changes:

   - Several flash entries have been added: Atmel AT25SF321, Spansion
     S28HL256T and S28HL02GT

   - Support for vcc-supply regulators and their DT bindings has been
     added

   - The mx25u25635f entry has been dropped. The flash shares its ID
     with mx25u25645g and both parts have an SFDP table. Removing their
     entry lets them be driven by the generic SFDP-based driver"

* tag 'mtd/for-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (47 commits)
  mtd: spinand: skyhigh: Align with recent read from cache variant changes
  mtd: spinand: winbond: Add support for DTR operations
  mtd: spinand: winbond: Add comment about naming
  mtd: spinand: winbond: Update the *JW chip definitions
  mtd: spinand: Add support for read DTR operations
  mtd: spinand: Enhance the logic when picking a variant
  mtd: spinand: Add an optional frequency to read from cache macros
  mtd: spinand: Create distinct fast and slow read from cache variants
  mtd: hyperbus: Use of_property_present() for non-boolean properties
  mtd: st_spi_fsm: Switch from CONFIG_PM_SLEEP guards to pm_sleep_ptr()
  mtd: rawnand: davinci: add ROM supported OOB layout
  mtd: spi-nor: sysfs: constify 'struct bin_attribute'
  mtd: spi-nor: spansion: Add support for S28HL02GT
  mtd: spi-nor: spansion: Add support for S28HL256T
  mtd: spi-nor: extend description of size member of struct flash_info
  mtd: rawnand: davinci: Reduce polling interval in NAND_OP_WAITRDY_INSTR
  mtd: rawnand: qcom: Fix build issue on x86 architecture
  mtd: rawnand: qcom: use FIELD_PREP and GENMASK
  mtd: nand: Add qpic_common API file
  mtd: rawnand: qcom: Add qcom prefix to common api
  ...

Author: torvalds

Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt

@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/cdns,hp-nfc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cadence NAND controller
+
+maintainers:
+  - Niravkumar L Rabara <[email protected]>
+
+allOf:
+  - $ref: nand-controller.yaml
+
+properties:
+  compatible:
+    items:
+      - const: cdns,hp-nfc
+
+  reg:
+    items:
+      - description: Controller register set
+      - description: Slave DMA data port register set
+
+  reg-names:
+    items:
+      - const: reg
+      - const: sdma
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  dmas:
+    maxItems: 1
+
+  cdns,board-delay-ps:
+    description: |
+      Estimated Board delay. The value includes the total round trip
+      delay for the signals and is used for deciding on values associated
+      with data read capture. The example formula for SDR mode is the
+      following.
+      board delay = RE#PAD delay + PCB trace to device + PCB trace from device
+      + DQ PAD delay
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - interrupts
+  - clocks
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    nand-controller@10b80000 {
+        compatible = "cdns,hp-nfc";
+        reg = <0x10b80000 0x10000>,
+              <0x10840000 0x10000>;
+        reg-names = "reg", "sdma";
+        #address-cells = <1>;
+        #size-cells = <0>;
+        interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&nf_clk>;
+        cdns,board-delay-ps = <4830>;
+
+        nand@0 {
+            reg = <0>;
+        };
+    };

Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml

@@ -96,6 +96,10 @@ properties:
       If "broken-flash-reset" is present then having this property does not
       make any difference.
 
+  vcc-supply:
+    description:
+      Supply for the SPI NOR power.
+
   spi-cpol: true
   spi-cpha: true
 

Documentation/devicetree/bindings/mtd/davinci-nand.txt

@@ -16,8 +16,9 @@ description: |
 
 properties:
   compatible:
-    items:
-      - const: microchip,48l640
+    enum:
+      - fujitsu,mb85rs128ty
+      - microchip,48l640
 
   reg:
     maxItems: 1

Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml

@@ -0,0 +1,95 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/nuvoton,ma35d1-nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nuvoton MA35D1 NAND Flash Interface (NFI) Controller
+
+maintainers:
+  - Hui-Ping Chen <[email protected]>
+
+allOf:
+  - $ref: nand-controller.yaml#
+
+properties:
+  compatible:
+    enum:
+      - nuvoton,ma35d1-nand-controller
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+patternProperties:
+  "^nand@[a-f0-9]$":
+    type: object
+    $ref: raw-nand-chip.yaml
+    properties:
+      reg:
+        minimum: 0
+        maximum: 1
+
+      nand-ecc-step-size:
+        enum: [512, 1024]
+
+      nand-ecc-strength:
+        enum: [8, 12, 24]
+
+    required:
+      - reg
+
+    unevaluatedProperties: false
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
+
+    soc {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        nand-controller@401A0000 {
+            compatible = "nuvoton,ma35d1-nand-controller";
+            reg = <0x0 0x401A0000 0x0 0x1000>;
+            interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+            clocks = <&clk NAND_GATE>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+
+            nand@0 {
+                reg = <0>;
+                nand-on-flash-bbt;
+                nand-ecc-step-size = <512>;
+                nand-ecc-strength = <8>;
+
+                partitions {
+                    compatible = "fixed-partitions";
+                    #address-cells = <1>;
+                    #size-cells = <1>;
+
+                    uboot@0 {
+                        label = "nand-uboot";
+                        read-only;
+                        reg = <0x0 0x300000>;
+                    };
+                };
+            };
+        };
+    };
+
+...