@@ -508,7 +508,6 @@ static struct sh_eth_cpu_data r8a779x_data = {
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.tpauser = 1 ,
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.hw_swap = 1 ,
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.rmiimode = 1 ,
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- .shift_rd0 = 1 ,
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};
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static void sh_eth_set_rate_sh7724 (struct net_device * ndev )
@@ -1410,6 +1409,8 @@ static int sh_eth_txfree(struct net_device *ndev)
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txdesc = & mdp -> tx_ring [entry ];
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if (txdesc -> status & cpu_to_edmac (mdp , TD_TACT ))
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break ;
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+ /* TACT bit must be checked before all the following reads */
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+ rmb ();
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/* Free the original skb. */
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if (mdp -> tx_skbuff [entry ]) {
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dma_unmap_single (& ndev -> dev , txdesc -> addr ,
@@ -1447,6 +1448,8 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
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limit = boguscnt ;
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rxdesc = & mdp -> rx_ring [entry ];
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while (!(rxdesc -> status & cpu_to_edmac (mdp , RD_RACT ))) {
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+ /* RACT bit must be checked before all the following reads */
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+ rmb ();
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desc_status = edmac_to_cpu (mdp , rxdesc -> status );
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pkt_len = rxdesc -> frame_length ;
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@@ -1458,8 +1461,8 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
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/* In case of almost all GETHER/ETHERs, the Receive Frame State
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* (RFS) bits in the Receive Descriptor 0 are from bit 9 to
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- * bit 0. However, in case of the R8A7740, R8A779x, and
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- * R7S72100 the RFS bits are from bit 25 to bit 16. So, the
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+ * bit 0. However, in case of the R8A7740 and R7S72100
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+ * the RFS bits are from bit 25 to bit 16. So, the
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* driver needs right shifting by 16.
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*/
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if (mdp -> cd -> shift_rd0 )
@@ -1526,6 +1529,7 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
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skb_checksum_none_assert (skb );
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rxdesc -> addr = dma_addr ;
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}
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+ wmb (); /* RACT bit must be set after all the above writes */
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if (entry >= mdp -> num_rx_ring - 1 )
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rxdesc -> status |=
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cpu_to_edmac (mdp , RD_RACT | RD_RFP | RD_RDEL );
@@ -1538,7 +1542,7 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
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/* If we don't need to check status, don't. -KDU */
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if (!(sh_eth_read (ndev , EDRRR ) & EDRRR_R )) {
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/* fix the values for the next receiving if RDE is set */
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- if (intr_status & EESR_RDE ) {
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+ if (intr_status & EESR_RDE && mdp -> reg_offset [ RDFAR ] != 0 ) {
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u32 count = (sh_eth_read (ndev , RDFAR ) -
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sh_eth_read (ndev , RDLAR )) >> 4 ;
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@@ -2177,7 +2181,7 @@ static int sh_eth_start_xmit(struct sk_buff *skb, struct net_device *ndev)
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}
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spin_unlock_irqrestore (& mdp -> lock , flags );
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- if (skb_padto (skb , ETH_ZLEN ))
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+ if (skb_put_padto (skb , ETH_ZLEN ))
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return NETDEV_TX_OK ;
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entry = mdp -> cur_tx % mdp -> num_tx_ring ;
@@ -2195,6 +2199,7 @@ static int sh_eth_start_xmit(struct sk_buff *skb, struct net_device *ndev)
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}
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txdesc -> buffer_length = skb -> len ;
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+ wmb (); /* TACT bit must be set after all the above writes */
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if (entry >= mdp -> num_tx_ring - 1 )
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txdesc -> status |= cpu_to_edmac (mdp , TD_TACT | TD_TDLE );
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else
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