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hkallweitdavem330
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r8169: add support for RTL8117
Add support for chip version RTL8117. Settings have been copied from Realtek's r8168 driver, there however chip ID 54a belongs to a chip version called RTL8168FP. It was confirmed that RTL8117 works with Realtek's driver, so both chip versions seem to be the same or at least compatible. Signed-off-by: Heiner Kallweit <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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drivers/net/ethernet/realtek/r8169_main.c

Lines changed: 120 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -135,6 +135,7 @@ enum mac_version {
135135
RTL_GIGA_MAC_VER_49,
136136
RTL_GIGA_MAC_VER_50,
137137
RTL_GIGA_MAC_VER_51,
138+
RTL_GIGA_MAC_VER_52,
138139
RTL_GIGA_MAC_VER_60,
139140
RTL_GIGA_MAC_VER_61,
140141
RTL_GIGA_MAC_NONE
@@ -202,6 +203,7 @@ static const struct {
202203
[RTL_GIGA_MAC_VER_49] = {"RTL8168ep/8111ep" },
203204
[RTL_GIGA_MAC_VER_50] = {"RTL8168ep/8111ep" },
204205
[RTL_GIGA_MAC_VER_51] = {"RTL8168ep/8111ep" },
206+
[RTL_GIGA_MAC_VER_52] = {"RTL8117" },
205207
[RTL_GIGA_MAC_VER_60] = {"RTL8125" },
206208
[RTL_GIGA_MAC_VER_61] = {"RTL8125", FIRMWARE_8125A_3},
207209
};
@@ -751,7 +753,7 @@ static bool rtl_is_8168evl_up(struct rtl8169_private *tp)
751753
{
752754
return tp->mac_version >= RTL_GIGA_MAC_VER_34 &&
753755
tp->mac_version != RTL_GIGA_MAC_VER_39 &&
754-
tp->mac_version <= RTL_GIGA_MAC_VER_51;
756+
tp->mac_version <= RTL_GIGA_MAC_VER_52;
755757
}
756758

757759
static bool rtl_supports_eee(struct rtl8169_private *tp)
@@ -1290,9 +1292,7 @@ static void rtl8168_driver_start(struct rtl8169_private *tp)
12901292
case RTL_GIGA_MAC_VER_31:
12911293
rtl8168dp_driver_start(tp);
12921294
break;
1293-
case RTL_GIGA_MAC_VER_49:
1294-
case RTL_GIGA_MAC_VER_50:
1295-
case RTL_GIGA_MAC_VER_51:
1295+
case RTL_GIGA_MAC_VER_49 ... RTL_GIGA_MAC_VER_52:
12961296
rtl8168ep_driver_start(tp);
12971297
break;
12981298
default:
@@ -1324,9 +1324,7 @@ static void rtl8168_driver_stop(struct rtl8169_private *tp)
13241324
case RTL_GIGA_MAC_VER_31:
13251325
rtl8168dp_driver_stop(tp);
13261326
break;
1327-
case RTL_GIGA_MAC_VER_49:
1328-
case RTL_GIGA_MAC_VER_50:
1329-
case RTL_GIGA_MAC_VER_51:
1327+
case RTL_GIGA_MAC_VER_49 ... RTL_GIGA_MAC_VER_52:
13301328
rtl8168ep_driver_stop(tp);
13311329
break;
13321330
default:
@@ -1354,9 +1352,7 @@ static bool r8168_check_dash(struct rtl8169_private *tp)
13541352
case RTL_GIGA_MAC_VER_28:
13551353
case RTL_GIGA_MAC_VER_31:
13561354
return r8168dp_check_dash(tp);
1357-
case RTL_GIGA_MAC_VER_49:
1358-
case RTL_GIGA_MAC_VER_50:
1359-
case RTL_GIGA_MAC_VER_51:
1355+
case RTL_GIGA_MAC_VER_49 ... RTL_GIGA_MAC_VER_52:
13601356
return r8168ep_check_dash(tp);
13611357
default:
13621358
return false;
@@ -1531,7 +1527,7 @@ static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts)
15311527
break;
15321528
case RTL_GIGA_MAC_VER_34:
15331529
case RTL_GIGA_MAC_VER_37:
1534-
case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_51:
1530+
case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_52:
15351531
options = RTL_R8(tp, Config2) & ~PME_SIGNAL;
15361532
if (wolopts)
15371533
options |= PME_SIGNAL;
@@ -2170,6 +2166,9 @@ static void rtl8169_get_mac_version(struct rtl8169_private *tp)
21702166
{ 0x7cf, 0x608, RTL_GIGA_MAC_VER_60 },
21712167
{ 0x7c8, 0x608, RTL_GIGA_MAC_VER_61 },
21722168

2169+
/* RTL8117 */
2170+
{ 0x7cf, 0x54a, RTL_GIGA_MAC_VER_52 },
2171+
21732172
/* 8168EP family. */
21742173
{ 0x7cf, 0x502, RTL_GIGA_MAC_VER_51 },
21752174
{ 0x7cf, 0x501, RTL_GIGA_MAC_VER_50 },
@@ -3336,6 +3335,46 @@ static void rtl8168ep_2_hw_phy_config(struct rtl8169_private *tp)
33363335
rtl_enable_eee(tp);
33373336
}
33383337

3338+
static void rtl8117_hw_phy_config(struct rtl8169_private *tp)
3339+
{
3340+
struct phy_device *phydev = tp->phydev;
3341+
3342+
/* CHN EST parameters adjust - fnet */
3343+
r8168g_phy_param(phydev, 0x808e, 0xff00, 0x4800);
3344+
r8168g_phy_param(phydev, 0x8090, 0xff00, 0xcc00);
3345+
r8168g_phy_param(phydev, 0x8092, 0xff00, 0xb000);
3346+
3347+
r8168g_phy_param(phydev, 0x8088, 0xff00, 0x6000);
3348+
r8168g_phy_param(phydev, 0x808b, 0x3f00, 0x0b00);
3349+
r8168g_phy_param(phydev, 0x808d, 0x1f00, 0x0600);
3350+
r8168g_phy_param(phydev, 0x808c, 0xff00, 0xb000);
3351+
r8168g_phy_param(phydev, 0x80a0, 0xff00, 0x2800);
3352+
r8168g_phy_param(phydev, 0x80a2, 0xff00, 0x5000);
3353+
r8168g_phy_param(phydev, 0x809b, 0xf800, 0xb000);
3354+
r8168g_phy_param(phydev, 0x809a, 0xff00, 0x4b00);
3355+
r8168g_phy_param(phydev, 0x809d, 0x3f00, 0x0800);
3356+
r8168g_phy_param(phydev, 0x80a1, 0xff00, 0x7000);
3357+
r8168g_phy_param(phydev, 0x809f, 0x1f00, 0x0300);
3358+
r8168g_phy_param(phydev, 0x809e, 0xff00, 0x8800);
3359+
r8168g_phy_param(phydev, 0x80b2, 0xff00, 0x2200);
3360+
r8168g_phy_param(phydev, 0x80ad, 0xf800, 0x9800);
3361+
r8168g_phy_param(phydev, 0x80af, 0x3f00, 0x0800);
3362+
r8168g_phy_param(phydev, 0x80b3, 0xff00, 0x6f00);
3363+
r8168g_phy_param(phydev, 0x80b1, 0x1f00, 0x0300);
3364+
r8168g_phy_param(phydev, 0x80b0, 0xff00, 0x9300);
3365+
3366+
r8168g_phy_param(phydev, 0x8011, 0x0000, 0x0800);
3367+
3368+
/* enable GPHY 10M */
3369+
phy_modify_paged(tp->phydev, 0x0a44, 0x11, 0, BIT(11));
3370+
3371+
r8168g_phy_param(phydev, 0x8016, 0x0000, 0x0400);
3372+
3373+
rtl8168g_disable_aldps(tp);
3374+
rtl8168h_config_eee_phy(tp);
3375+
rtl_enable_eee(tp);
3376+
}
3377+
33393378
static void rtl8102e_hw_phy_config(struct rtl8169_private *tp)
33403379
{
33413380
static const struct phy_reg phy_reg_init[] = {
@@ -3564,6 +3603,7 @@ static void rtl_hw_phy_config(struct net_device *dev)
35643603
[RTL_GIGA_MAC_VER_49] = rtl8168ep_1_hw_phy_config,
35653604
[RTL_GIGA_MAC_VER_50] = rtl8168ep_2_hw_phy_config,
35663605
[RTL_GIGA_MAC_VER_51] = rtl8168ep_2_hw_phy_config,
3606+
[RTL_GIGA_MAC_VER_52] = rtl8117_hw_phy_config,
35673607
[RTL_GIGA_MAC_VER_60] = rtl8125_1_hw_phy_config,
35683608
[RTL_GIGA_MAC_VER_61] = rtl8125_2_hw_phy_config,
35693609
};
@@ -3657,7 +3697,7 @@ static void rtl_wol_suspend_quirk(struct rtl8169_private *tp)
36573697
case RTL_GIGA_MAC_VER_32:
36583698
case RTL_GIGA_MAC_VER_33:
36593699
case RTL_GIGA_MAC_VER_34:
3660-
case RTL_GIGA_MAC_VER_37 ... RTL_GIGA_MAC_VER_51:
3700+
case RTL_GIGA_MAC_VER_37 ... RTL_GIGA_MAC_VER_52:
36613701
RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) |
36623702
AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
36633703
break;
@@ -3693,6 +3733,7 @@ static void rtl_pll_power_down(struct rtl8169_private *tp)
36933733
case RTL_GIGA_MAC_VER_48:
36943734
case RTL_GIGA_MAC_VER_50:
36953735
case RTL_GIGA_MAC_VER_51:
3736+
case RTL_GIGA_MAC_VER_52:
36963737
case RTL_GIGA_MAC_VER_60:
36973738
case RTL_GIGA_MAC_VER_61:
36983739
RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~0x80);
@@ -3724,6 +3765,7 @@ static void rtl_pll_power_up(struct rtl8169_private *tp)
37243765
case RTL_GIGA_MAC_VER_48:
37253766
case RTL_GIGA_MAC_VER_50:
37263767
case RTL_GIGA_MAC_VER_51:
3768+
case RTL_GIGA_MAC_VER_52:
37273769
case RTL_GIGA_MAC_VER_60:
37283770
case RTL_GIGA_MAC_VER_61:
37293771
RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | 0xc0);
@@ -3755,7 +3797,7 @@ static void rtl_init_rxcfg(struct rtl8169_private *tp)
37553797
case RTL_GIGA_MAC_VER_38:
37563798
RTL_W32(tp, RxConfig, RX128_INT_EN | RX_MULTI_EN | RX_DMA_BURST);
37573799
break;
3758-
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_51:
3800+
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_52:
37593801
RTL_W32(tp, RxConfig, RX128_INT_EN | RX_MULTI_EN | RX_DMA_BURST | RX_EARLY_OFF);
37603802
break;
37613803
case RTL_GIGA_MAC_VER_60 ... RTL_GIGA_MAC_VER_61:
@@ -3941,7 +3983,7 @@ static void rtl8169_hw_reset(struct rtl8169_private *tp)
39413983
rtl_udelay_loop_wait_low(tp, &rtl_npq_cond, 20, 42*42);
39423984
break;
39433985
case RTL_GIGA_MAC_VER_34 ... RTL_GIGA_MAC_VER_38:
3944-
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_51:
3986+
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_52:
39453987
RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
39463988
rtl_udelay_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 666);
39473989
break;
@@ -4787,6 +4829,68 @@ static void rtl_hw_start_8168ep_3(struct rtl8169_private *tp)
47874829
rtl_hw_aspm_clkreq_enable(tp, true);
47884830
}
47894831

4832+
static void rtl_hw_start_8117(struct rtl8169_private *tp)
4833+
{
4834+
static const struct ephy_info e_info_8117[] = {
4835+
{ 0x19, 0x0040, 0x1100 },
4836+
{ 0x59, 0x0040, 0x1100 },
4837+
};
4838+
int rg_saw_cnt;
4839+
4840+
rtl8168ep_stop_cmac(tp);
4841+
4842+
/* disable aspm and clock request before access ephy */
4843+
rtl_hw_aspm_clkreq_enable(tp, false);
4844+
rtl_ephy_init(tp, e_info_8117);
4845+
4846+
rtl_set_fifo_size(tp, 0x08, 0x10, 0x02, 0x06);
4847+
rtl8168g_set_pause_thresholds(tp, 0x2f, 0x5f);
4848+
4849+
rtl_set_def_aspm_entry_latency(tp);
4850+
4851+
rtl_reset_packet_filter(tp);
4852+
4853+
rtl_eri_set_bits(tp, 0xd4, ERIAR_MASK_1111, 0x1f90);
4854+
4855+
rtl_eri_write(tp, 0x5f0, ERIAR_MASK_0011, 0x4f87);
4856+
4857+
RTL_W32(tp, MISC, RTL_R32(tp, MISC) & ~RXDV_GATED_EN);
4858+
4859+
rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000);
4860+
rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000);
4861+
4862+
rtl8168_config_eee_mac(tp);
4863+
4864+
RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) & ~PFM_EN);
4865+
RTL_W8(tp, MISC_1, RTL_R8(tp, MISC_1) & ~PFM_D3COLD_EN);
4866+
4867+
RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) & ~TX_10M_PS_EN);
4868+
4869+
rtl_eri_clear_bits(tp, 0x1b0, ERIAR_MASK_0011, BIT(12));
4870+
4871+
rtl_pcie_state_l2l3_disable(tp);
4872+
4873+
rg_saw_cnt = phy_read_paged(tp->phydev, 0x0c42, 0x13) & 0x3fff;
4874+
if (rg_saw_cnt > 0) {
4875+
u16 sw_cnt_1ms_ini;
4876+
4877+
sw_cnt_1ms_ini = (16000000 / rg_saw_cnt) & 0x0fff;
4878+
r8168_mac_ocp_modify(tp, 0xd412, 0x0fff, sw_cnt_1ms_ini);
4879+
}
4880+
4881+
r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0070);
4882+
r8168_mac_ocp_write(tp, 0xea80, 0x0003);
4883+
r8168_mac_ocp_modify(tp, 0xe052, 0x0000, 0x0009);
4884+
r8168_mac_ocp_modify(tp, 0xd420, 0x0fff, 0x047f);
4885+
4886+
r8168_mac_ocp_write(tp, 0xe63e, 0x0001);
4887+
r8168_mac_ocp_write(tp, 0xe63e, 0x0000);
4888+
r8168_mac_ocp_write(tp, 0xc094, 0x0000);
4889+
r8168_mac_ocp_write(tp, 0xc09e, 0x0000);
4890+
4891+
rtl_hw_aspm_clkreq_enable(tp, true);
4892+
}
4893+
47904894
static void rtl_hw_start_8102e_1(struct rtl8169_private *tp)
47914895
{
47924896
static const struct ephy_info e_info_8102e_1[] = {
@@ -5074,6 +5178,7 @@ static void rtl_hw_config(struct rtl8169_private *tp)
50745178
[RTL_GIGA_MAC_VER_49] = rtl_hw_start_8168ep_1,
50755179
[RTL_GIGA_MAC_VER_50] = rtl_hw_start_8168ep_2,
50765180
[RTL_GIGA_MAC_VER_51] = rtl_hw_start_8168ep_3,
5181+
[RTL_GIGA_MAC_VER_52] = rtl_hw_start_8117,
50775182
[RTL_GIGA_MAC_VER_60] = rtl_hw_start_8125_1,
50785183
[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125_2,
50795184
};
@@ -6620,7 +6725,7 @@ static void rtl_hw_init_8125(struct rtl8169_private *tp)
66206725
static void rtl_hw_initialize(struct rtl8169_private *tp)
66216726
{
66226727
switch (tp->mac_version) {
6623-
case RTL_GIGA_MAC_VER_49 ... RTL_GIGA_MAC_VER_51:
6728+
case RTL_GIGA_MAC_VER_49 ... RTL_GIGA_MAC_VER_52:
66246729
rtl8168ep_stop_cmac(tp);
66256730
/* fall through */
66266731
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_48:

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