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lines changed Original file line number Diff line number Diff line change @@ -77,18 +77,15 @@ struct sh_mmcif_plat_data {
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/* CE_CLK_CTRL */
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#define CLK_ENABLE (1 << 24) /* 1: output mmc clock */
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- #define CLK_CLEAR ((1 << 19) | (1 << 18) | (1 << 17) | (1 << 16))
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- #define CLK_SUP_PCLK ((1 << 19) | (1 << 18) | (1 << 17) | (1 << 16))
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- #define CLKDIV_4 (1<<16) /* mmc clock frequency.
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- * n: bus clock/(2^(n+1)) */
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- #define CLKDIV_256 (7<<16) /* mmc clock frequency. (see above) */
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- #define SRSPTO_256 ((1 << 13) | (0 << 12)) /* resp timeout */
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- #define SRBSYTO_29 ((1 << 11) | (1 << 10) | \
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- (1 << 9) | (1 << 8)) /* resp busy timeout */
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- #define SRWDTO_29 ((1 << 7) | (1 << 6) | \
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- (1 << 5) | (1 << 4)) /* read/write timeout */
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- #define SCCSTO_29 ((1 << 3) | (1 << 2) | \
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- (1 << 1) | (1 << 0)) /* ccs timeout */
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+ #define CLK_CLEAR (0xf << 16)
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+ #define CLK_SUP_PCLK (0xf << 16)
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+ #define CLKDIV_4 (1 << 16) /* mmc clock frequency.
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+ * n: bus clock/(2^(n+1)) */
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+ #define CLKDIV_256 (7 << 16) /* mmc clock frequency. (see above) */
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+ #define SRSPTO_256 (2 << 12) /* resp timeout */
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+ #define SRBSYTO_29 (0xf << 8) /* resp busy timeout */
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+ #define SRWDTO_29 (0xf << 4) /* read/write timeout */
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+ #define SCCSTO_29 (0xf << 0) /* ccs timeout */
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/* CE_VERSION */
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#define SOFT_RST_ON (1 << 31)
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