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Yuval Mintzdavem330
authored andcommitted
qed: Introduce VFs
This adds the qed VFs for the first time - The vfs are limited functions, with a very different PCI bar structure [when compared with PFs] to better impose the related security demands associated with them. This patch includes the logic neccesary to allow VFs to successfully probe [without actually adding the ability to enable iov]. This includes diverging all the flows that would occur as part of the pci probe of the driver, preventing VF from accessing registers/memories it can't and instead utilize the VF->PF channel to query the PF for needed information. Signed-off-by: Yuval Mintz <[email protected]> Signed-off-by: David S. Miller <[email protected]>
1 parent 37bff2b commit 1408cc1

25 files changed

+1842
-188
lines changed

drivers/net/ethernet/qlogic/qed/Makefile

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,4 +3,4 @@ obj-$(CONFIG_QED) := qed.o
33
qed-y := qed_cxt.o qed_dev.o qed_hw.o qed_init_fw_funcs.o qed_init_ops.o \
44
qed_int.o qed_main.o qed_mcp.o qed_sp_commands.o qed_spq.o qed_l2.o \
55
qed_selftest.o
6-
qed-$(CONFIG_QED_SRIOV) += qed_sriov.o
6+
qed-$(CONFIG_QED_SRIOV) += qed_sriov.o qed_vf.o

drivers/net/ethernet/qlogic/qed/qed.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -311,6 +311,8 @@ struct qed_hwfn {
311311
bool first_on_engine;
312312
bool hw_init_done;
313313

314+
u8 num_funcs_on_engine;
315+
314316
/* BAR access */
315317
void __iomem *regview;
316318
void __iomem *doorbells;
@@ -361,6 +363,7 @@ struct qed_hwfn {
361363
/* True if the driver requests for the link */
362364
bool b_drv_link_init;
363365

366+
struct qed_vf_iov *vf_iov_info;
364367
struct qed_pf_iov *pf_iov_info;
365368
struct qed_mcp_info *mcp_info;
366369

@@ -497,6 +500,8 @@ struct qed_dev {
497500
#define IS_QED_SRIOV(cdev) (!!(cdev)->p_iov_info)
498501

499502
unsigned long tunn_mode;
503+
504+
bool b_is_vf;
500505
u32 drv_type;
501506

502507
struct qed_eth_stats *reset_stats;

drivers/net/ethernet/qlogic/qed/qed_cxt.c

Lines changed: 161 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -24,11 +24,13 @@
2424
#include "qed_hw.h"
2525
#include "qed_init_ops.h"
2626
#include "qed_reg_addr.h"
27+
#include "qed_sriov.h"
2728

2829
/* Max number of connection types in HW (DQ/CDU etc.) */
2930
#define MAX_CONN_TYPES PROTOCOLID_COMMON
3031
#define NUM_TASK_TYPES 2
3132
#define NUM_TASK_PF_SEGMENTS 4
33+
#define NUM_TASK_VF_SEGMENTS 1
3234

3335
/* QM constants */
3436
#define QM_PQ_ELEMENT_SIZE 4 /* in bytes */
@@ -63,10 +65,12 @@ union conn_context {
6365
struct qed_conn_type_cfg {
6466
u32 cid_count;
6567
u32 cid_start;
68+
u32 cids_per_vf;
6669
};
6770

6871
/* ILT Client configuration, Per connection type (protocol) resources. */
6972
#define ILT_CLI_PF_BLOCKS (1 + NUM_TASK_PF_SEGMENTS * 2)
73+
#define ILT_CLI_VF_BLOCKS (1 + NUM_TASK_VF_SEGMENTS * 2)
7074
#define CDUC_BLK (0)
7175

7276
enum ilt_clients {
@@ -97,6 +101,10 @@ struct qed_ilt_client_cfg {
97101
/* ILT client blocks for PF */
98102
struct qed_ilt_cli_blk pf_blks[ILT_CLI_PF_BLOCKS];
99103
u32 pf_total_lines;
104+
105+
/* ILT client blocks for VFs */
106+
struct qed_ilt_cli_blk vf_blks[ILT_CLI_VF_BLOCKS];
107+
u32 vf_total_lines;
100108
};
101109

102110
/* Per Path -
@@ -123,6 +131,11 @@ struct qed_cxt_mngr {
123131
/* computed ILT structure */
124132
struct qed_ilt_client_cfg clients[ILT_CLI_MAX];
125133

134+
/* total number of VFs for this hwfn -
135+
* ALL VFs are symmetric in terms of HW resources
136+
*/
137+
u32 vf_count;
138+
126139
/* Acquired CIDs */
127140
struct qed_cid_acquired_map acquired[MAX_CONN_TYPES];
128141

@@ -131,37 +144,60 @@ struct qed_cxt_mngr {
131144
u32 pf_start_line;
132145
};
133146

134-
static u32 qed_cxt_cdu_iids(struct qed_cxt_mngr *p_mngr)
135-
{
136-
u32 type, pf_cids = 0;
147+
/* counts the iids for the CDU/CDUC ILT client configuration */
148+
struct qed_cdu_iids {
149+
u32 pf_cids;
150+
u32 per_vf_cids;
151+
};
137152

138-
for (type = 0; type < MAX_CONN_TYPES; type++)
139-
pf_cids += p_mngr->conn_cfg[type].cid_count;
153+
static void qed_cxt_cdu_iids(struct qed_cxt_mngr *p_mngr,
154+
struct qed_cdu_iids *iids)
155+
{
156+
u32 type;
140157

141-
return pf_cids;
158+
for (type = 0; type < MAX_CONN_TYPES; type++) {
159+
iids->pf_cids += p_mngr->conn_cfg[type].cid_count;
160+
iids->per_vf_cids += p_mngr->conn_cfg[type].cids_per_vf;
161+
}
142162
}
143163

144164
static void qed_cxt_qm_iids(struct qed_hwfn *p_hwfn,
145165
struct qed_qm_iids *iids)
146166
{
147167
struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
148-
int type;
168+
u32 vf_cids = 0, type;
149169

150-
for (type = 0; type < MAX_CONN_TYPES; type++)
170+
for (type = 0; type < MAX_CONN_TYPES; type++) {
151171
iids->cids += p_mngr->conn_cfg[type].cid_count;
172+
vf_cids += p_mngr->conn_cfg[type].cids_per_vf;
173+
}
152174

153-
DP_VERBOSE(p_hwfn, QED_MSG_ILT, "iids: CIDS %08x\n", iids->cids);
175+
iids->vf_cids += vf_cids * p_mngr->vf_count;
176+
DP_VERBOSE(p_hwfn, QED_MSG_ILT,
177+
"iids: CIDS %08x vf_cids %08x\n",
178+
iids->cids, iids->vf_cids);
154179
}
155180

156181
/* set the iids count per protocol */
157182
static void qed_cxt_set_proto_cid_count(struct qed_hwfn *p_hwfn,
158183
enum protocol_type type,
159-
u32 cid_count)
184+
u32 cid_count, u32 vf_cid_cnt)
160185
{
161186
struct qed_cxt_mngr *p_mgr = p_hwfn->p_cxt_mngr;
162187
struct qed_conn_type_cfg *p_conn = &p_mgr->conn_cfg[type];
163188

164189
p_conn->cid_count = roundup(cid_count, DQ_RANGE_ALIGN);
190+
p_conn->cids_per_vf = roundup(vf_cid_cnt, DQ_RANGE_ALIGN);
191+
}
192+
193+
u32 qed_cxt_get_proto_cid_count(struct qed_hwfn *p_hwfn,
194+
enum protocol_type type,
195+
u32 *vf_cid)
196+
{
197+
if (vf_cid)
198+
*vf_cid = p_hwfn->p_cxt_mngr->conn_cfg[type].cids_per_vf;
199+
200+
return p_hwfn->p_cxt_mngr->conn_cfg[type].cid_count;
165201
}
166202

167203
static void qed_ilt_cli_blk_fill(struct qed_ilt_client_cfg *p_cli,
@@ -210,10 +246,12 @@ int qed_cxt_cfg_ilt_compute(struct qed_hwfn *p_hwfn)
210246
struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
211247
struct qed_ilt_client_cfg *p_cli;
212248
struct qed_ilt_cli_blk *p_blk;
213-
u32 curr_line, total, pf_cids;
249+
struct qed_cdu_iids cdu_iids;
214250
struct qed_qm_iids qm_iids;
251+
u32 curr_line, total, i;
215252

216253
memset(&qm_iids, 0, sizeof(qm_iids));
254+
memset(&cdu_iids, 0, sizeof(cdu_iids));
217255

218256
p_mngr->pf_start_line = RESC_START(p_hwfn, QED_ILT);
219257

@@ -224,32 +262,53 @@ int qed_cxt_cfg_ilt_compute(struct qed_hwfn *p_hwfn)
224262
/* CDUC */
225263
p_cli = &p_mngr->clients[ILT_CLI_CDUC];
226264
curr_line = p_mngr->pf_start_line;
265+
266+
/* CDUC PF */
227267
p_cli->pf_total_lines = 0;
228268

229269
/* get the counters for the CDUC and QM clients */
230-
pf_cids = qed_cxt_cdu_iids(p_mngr);
270+
qed_cxt_cdu_iids(p_mngr, &cdu_iids);
231271

232272
p_blk = &p_cli->pf_blks[CDUC_BLK];
233273

234-
total = pf_cids * CONN_CXT_SIZE(p_hwfn);
274+
total = cdu_iids.pf_cids * CONN_CXT_SIZE(p_hwfn);
235275

236276
qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line,
237277
total, CONN_CXT_SIZE(p_hwfn));
238278

239279
qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, ILT_CLI_CDUC);
240280
p_cli->pf_total_lines = curr_line - p_blk->start_line;
241281

282+
/* CDUC VF */
283+
p_blk = &p_cli->vf_blks[CDUC_BLK];
284+
total = cdu_iids.per_vf_cids * CONN_CXT_SIZE(p_hwfn);
285+
286+
qed_ilt_cli_blk_fill(p_cli, p_blk, curr_line,
287+
total, CONN_CXT_SIZE(p_hwfn));
288+
289+
qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line, ILT_CLI_CDUC);
290+
p_cli->vf_total_lines = curr_line - p_blk->start_line;
291+
292+
for (i = 1; i < p_mngr->vf_count; i++)
293+
qed_ilt_cli_adv_line(p_hwfn, p_cli, p_blk, &curr_line,
294+
ILT_CLI_CDUC);
295+
242296
/* QM */
243297
p_cli = &p_mngr->clients[ILT_CLI_QM];
244298
p_blk = &p_cli->pf_blks[0];
245299

246300
qed_cxt_qm_iids(p_hwfn, &qm_iids);
247-
total = qed_qm_pf_mem_size(p_hwfn->rel_pf_id, qm_iids.cids, 0, 0,
248-
p_hwfn->qm_info.num_pqs, 0);
249-
250-
DP_VERBOSE(p_hwfn, QED_MSG_ILT,
251-
"QM ILT Info, (cids=%d, num_pqs=%d, memory_size=%d)\n",
252-
qm_iids.cids, p_hwfn->qm_info.num_pqs, total);
301+
total = qed_qm_pf_mem_size(p_hwfn->rel_pf_id, qm_iids.cids,
302+
qm_iids.vf_cids, 0,
303+
p_hwfn->qm_info.num_pqs,
304+
p_hwfn->qm_info.num_vf_pqs);
305+
306+
DP_VERBOSE(p_hwfn,
307+
QED_MSG_ILT,
308+
"QM ILT Info, (cids=%d, vf_cids=%d, num_pqs=%d, num_vf_pqs=%d, memory_size=%d)\n",
309+
qm_iids.cids,
310+
qm_iids.vf_cids,
311+
p_hwfn->qm_info.num_pqs, p_hwfn->qm_info.num_vf_pqs, total);
253312

254313
qed_ilt_cli_blk_fill(p_cli, p_blk,
255314
curr_line, total * 0x1000,
@@ -358,7 +417,7 @@ static int qed_ilt_shadow_alloc(struct qed_hwfn *p_hwfn)
358417
struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
359418
struct qed_ilt_client_cfg *clients = p_mngr->clients;
360419
struct qed_ilt_cli_blk *p_blk;
361-
u32 size, i, j;
420+
u32 size, i, j, k;
362421
int rc;
363422

364423
size = qed_cxt_ilt_shadow_size(clients);
@@ -383,6 +442,16 @@ static int qed_ilt_shadow_alloc(struct qed_hwfn *p_hwfn)
383442
if (rc != 0)
384443
goto ilt_shadow_fail;
385444
}
445+
for (k = 0; k < p_mngr->vf_count; k++) {
446+
for (j = 0; j < ILT_CLI_VF_BLOCKS; j++) {
447+
u32 lines = clients[i].vf_total_lines * k;
448+
449+
p_blk = &clients[i].vf_blks[j];
450+
rc = qed_ilt_blk_alloc(p_hwfn, p_blk, i, lines);
451+
if (rc != 0)
452+
goto ilt_shadow_fail;
453+
}
454+
}
386455
}
387456

388457
return 0;
@@ -467,6 +536,9 @@ int qed_cxt_mngr_alloc(struct qed_hwfn *p_hwfn)
467536
for (i = 0; i < ILT_CLI_MAX; i++)
468537
p_mngr->clients[i].p_size.val = ILT_DEFAULT_HW_P_SIZE;
469538

539+
if (p_hwfn->cdev->p_iov_info)
540+
p_mngr->vf_count = p_hwfn->cdev->p_iov_info->total_vfs;
541+
470542
/* Set the cxt mangr pointer priori to further allocations */
471543
p_hwfn->p_cxt_mngr = p_mngr;
472544

@@ -579,8 +651,10 @@ void qed_qm_init_pf(struct qed_hwfn *p_hwfn)
579651
params.max_phys_tcs_per_port = qm_info->max_phys_tcs_per_port;
580652
params.is_first_pf = p_hwfn->first_on_engine;
581653
params.num_pf_cids = iids.cids;
654+
params.num_vf_cids = iids.vf_cids;
582655
params.start_pq = qm_info->start_pq;
583-
params.num_pf_pqs = qm_info->num_pqs;
656+
params.num_pf_pqs = qm_info->num_pqs - qm_info->num_vf_pqs;
657+
params.num_vf_pqs = qm_info->num_vf_pqs;
584658
params.start_vport = qm_info->start_vport;
585659
params.num_vports = qm_info->num_vports;
586660
params.pf_wfq = qm_info->pf_wfq;
@@ -610,26 +684,55 @@ static int qed_cm_init_pf(struct qed_hwfn *p_hwfn)
610684
static void qed_dq_init_pf(struct qed_hwfn *p_hwfn)
611685
{
612686
struct qed_cxt_mngr *p_mngr = p_hwfn->p_cxt_mngr;
613-
u32 dq_pf_max_cid = 0;
687+
u32 dq_pf_max_cid = 0, dq_vf_max_cid = 0;
614688

615689
dq_pf_max_cid += (p_mngr->conn_cfg[0].cid_count >> DQ_RANGE_SHIFT);
616690
STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_0_RT_OFFSET, dq_pf_max_cid);
617691

692+
dq_vf_max_cid += (p_mngr->conn_cfg[0].cids_per_vf >> DQ_RANGE_SHIFT);
693+
STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_0_RT_OFFSET, dq_vf_max_cid);
694+
618695
dq_pf_max_cid += (p_mngr->conn_cfg[1].cid_count >> DQ_RANGE_SHIFT);
619696
STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_1_RT_OFFSET, dq_pf_max_cid);
620697

698+
dq_vf_max_cid += (p_mngr->conn_cfg[1].cids_per_vf >> DQ_RANGE_SHIFT);
699+
STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_1_RT_OFFSET, dq_vf_max_cid);
700+
621701
dq_pf_max_cid += (p_mngr->conn_cfg[2].cid_count >> DQ_RANGE_SHIFT);
622702
STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_2_RT_OFFSET, dq_pf_max_cid);
623703

704+
dq_vf_max_cid += (p_mngr->conn_cfg[2].cids_per_vf >> DQ_RANGE_SHIFT);
705+
STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_2_RT_OFFSET, dq_vf_max_cid);
706+
624707
dq_pf_max_cid += (p_mngr->conn_cfg[3].cid_count >> DQ_RANGE_SHIFT);
625708
STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_3_RT_OFFSET, dq_pf_max_cid);
626709

710+
dq_vf_max_cid += (p_mngr->conn_cfg[3].cids_per_vf >> DQ_RANGE_SHIFT);
711+
STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_3_RT_OFFSET, dq_vf_max_cid);
712+
627713
dq_pf_max_cid += (p_mngr->conn_cfg[4].cid_count >> DQ_RANGE_SHIFT);
628714
STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_4_RT_OFFSET, dq_pf_max_cid);
629715

630-
/* 5 - PF */
716+
dq_vf_max_cid += (p_mngr->conn_cfg[4].cids_per_vf >> DQ_RANGE_SHIFT);
717+
STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_4_RT_OFFSET, dq_vf_max_cid);
718+
631719
dq_pf_max_cid += (p_mngr->conn_cfg[5].cid_count >> DQ_RANGE_SHIFT);
632720
STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_5_RT_OFFSET, dq_pf_max_cid);
721+
722+
dq_vf_max_cid += (p_mngr->conn_cfg[5].cids_per_vf >> DQ_RANGE_SHIFT);
723+
STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_5_RT_OFFSET, dq_vf_max_cid);
724+
725+
/* Connection types 6 & 7 are not in use, yet they must be configured
726+
* as the highest possible connection. Not configuring them means the
727+
* defaults will be used, and with a large number of cids a bug may
728+
* occur, if the defaults will be smaller than dq_pf_max_cid /
729+
* dq_vf_max_cid.
730+
*/
731+
STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_6_RT_OFFSET, dq_pf_max_cid);
732+
STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_6_RT_OFFSET, dq_vf_max_cid);
733+
734+
STORE_RT_REG(p_hwfn, DORQ_REG_PF_MAX_ICID_7_RT_OFFSET, dq_pf_max_cid);
735+
STORE_RT_REG(p_hwfn, DORQ_REG_VF_MAX_ICID_7_RT_OFFSET, dq_vf_max_cid);
633736
}
634737

635738
static void qed_ilt_bounds_init(struct qed_hwfn *p_hwfn)
@@ -653,6 +756,38 @@ static void qed_ilt_bounds_init(struct qed_hwfn *p_hwfn)
653756
}
654757
}
655758

759+
static void qed_ilt_vf_bounds_init(struct qed_hwfn *p_hwfn)
760+
{
761+
struct qed_ilt_client_cfg *p_cli;
762+
u32 blk_factor;
763+
764+
/* For simplicty we set the 'block' to be an ILT page */
765+
if (p_hwfn->cdev->p_iov_info) {
766+
struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
767+
768+
STORE_RT_REG(p_hwfn,
769+
PSWRQ2_REG_VF_BASE_RT_OFFSET,
770+
p_iov->first_vf_in_pf);
771+
STORE_RT_REG(p_hwfn,
772+
PSWRQ2_REG_VF_LAST_ILT_RT_OFFSET,
773+
p_iov->first_vf_in_pf + p_iov->total_vfs);
774+
}
775+
776+
p_cli = &p_hwfn->p_cxt_mngr->clients[ILT_CLI_CDUC];
777+
blk_factor = ilog2(ILT_PAGE_IN_BYTES(p_cli->p_size.val) >> 10);
778+
if (p_cli->active) {
779+
STORE_RT_REG(p_hwfn,
780+
PSWRQ2_REG_CDUC_BLOCKS_FACTOR_RT_OFFSET,
781+
blk_factor);
782+
STORE_RT_REG(p_hwfn,
783+
PSWRQ2_REG_CDUC_NUMBER_OF_PF_BLOCKS_RT_OFFSET,
784+
p_cli->pf_total_lines);
785+
STORE_RT_REG(p_hwfn,
786+
PSWRQ2_REG_CDUC_VF_BLOCKS_RT_OFFSET,
787+
p_cli->vf_total_lines);
788+
}
789+
}
790+
656791
/* ILT (PSWRQ2) PF */
657792
static void qed_ilt_init_pf(struct qed_hwfn *p_hwfn)
658793
{
@@ -662,6 +797,7 @@ static void qed_ilt_init_pf(struct qed_hwfn *p_hwfn)
662797
u32 line, rt_offst, i;
663798

664799
qed_ilt_bounds_init(p_hwfn);
800+
qed_ilt_vf_bounds_init(p_hwfn);
665801

666802
p_mngr = p_hwfn->p_cxt_mngr;
667803
p_shdw = p_mngr->ilt_shadow;
@@ -839,10 +975,10 @@ int qed_cxt_set_pf_params(struct qed_hwfn *p_hwfn)
839975
/* Set the number of required CORE connections */
840976
u32 core_cids = 1; /* SPQ */
841977

842-
qed_cxt_set_proto_cid_count(p_hwfn, PROTOCOLID_CORE, core_cids);
978+
qed_cxt_set_proto_cid_count(p_hwfn, PROTOCOLID_CORE, core_cids, 0);
843979

844980
qed_cxt_set_proto_cid_count(p_hwfn, PROTOCOLID_ETH,
845-
p_params->num_cons);
981+
p_params->num_cons, 1);
846982

847983
return 0;
848984
}

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