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ARM: dts: Configure system timers for omap4
We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Cc: [email protected] Cc: Grygorii Strashko <[email protected]> Cc: Keerthy <[email protected]> Cc: Lokesh Vutla <[email protected]> Cc: Rob Herring <[email protected]> Cc: Tero Kristo <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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‎arch/arm/boot/dts/omap4-l4.dtsi

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -974,7 +974,6 @@
974974

975975
target-module@4000 { /* 0x4a304000, ap 17 24.0 */
976976
compatible = "ti,sysc-omap2", "ti,sysc";
977-
ti,hwmods = "counter_32k";
978977
reg = <0x4000 0x4>,
979978
<0x4004 0x4>;
980979
reg-names = "rev", "sysc";
@@ -1139,9 +1138,8 @@
11391138
};
11401139
};
11411140

1142-
target-module@8000 { /* 0x4a318000, ap 9 1c.0 */
1141+
timer1_target: target-module@8000 { /* 0x4a318000, ap 9 1c.0 */
11431142
compatible = "ti,sysc-omap2-timer", "ti,sysc";
1144-
ti,hwmods = "timer1";
11451143
reg = <0x8000 0x4>,
11461144
<0x8010 0x4>,
11471145
<0x8014 0x4>;

‎arch/arm/boot/dts/omap4.dtsi

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -655,3 +655,13 @@
655655
#reset-cells = <1>;
656656
};
657657
};
658+
659+
/* Preferred always-on timer for clockevent */
660+
&timer1_target {
661+
ti,no-reset-on-init;
662+
ti,no-idle;
663+
timer@0 {
664+
assigned-clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>;
665+
assigned-clock-parents = <&sys_clkin_ck>;
666+
};
667+
};

‎arch/arm/mach-omap2/board-generic.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -261,7 +261,7 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
261261
.init_irq = omap_gic_of_init,
262262
.init_machine = omap_generic_init,
263263
.init_late = omap4430_init_late,
264-
.init_time = omap4_local_timer_init,
264+
.init_time = omap_init_time_of,
265265
.dt_compat = omap4_boards_compat,
266266
.restart = omap44xx_restart,
267267
MACHINE_END

‎arch/arm/mach-omap2/omap_hwmod_44xx_data.c

Lines changed: 0 additions & 90 deletions
Original file line numberDiff line numberDiff line change
@@ -231,39 +231,6 @@ static struct omap_hwmod omap44xx_ocp_wp_noc_hwmod = {
231231
* usim
232232
*/
233233

234-
/*
235-
* 'counter' class
236-
* 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
237-
*/
238-
239-
static struct omap_hwmod_class_sysconfig omap44xx_counter_sysc = {
240-
.rev_offs = 0x0000,
241-
.sysc_offs = 0x0004,
242-
.sysc_flags = SYSC_HAS_SIDLEMODE,
243-
.idlemodes = (SIDLE_FORCE | SIDLE_NO),
244-
.sysc_fields = &omap_hwmod_sysc_type1,
245-
};
246-
247-
static struct omap_hwmod_class omap44xx_counter_hwmod_class = {
248-
.name = "counter",
249-
.sysc = &omap44xx_counter_sysc,
250-
};
251-
252-
/* counter_32k */
253-
static struct omap_hwmod omap44xx_counter_32k_hwmod = {
254-
.name = "counter_32k",
255-
.class = &omap44xx_counter_hwmod_class,
256-
.clkdm_name = "l4_wkup_clkdm",
257-
.flags = HWMOD_SWSUP_SIDLE,
258-
.main_clk = "sys_32k_ck",
259-
.prcm = {
260-
.omap4 = {
261-
.clkctrl_offs = OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET,
262-
.context_offs = OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET,
263-
},
264-
},
265-
};
266-
267234
/*
268235
* 'ctrl_module' class
269236
* attila core control module + core pad control module + wkup pad control
@@ -672,45 +639,6 @@ static struct omap_hwmod omap44xx_sl2if_hwmod = {
672639
},
673640
};
674641

675-
/*
676-
* 'timer' class
677-
* general purpose timer module with accurate 1ms tick
678-
* This class contains several variants: ['timer_1ms', 'timer']
679-
*/
680-
681-
static struct omap_hwmod_class_sysconfig omap44xx_timer_1ms_sysc = {
682-
.rev_offs = 0x0000,
683-
.sysc_offs = 0x0010,
684-
.syss_offs = 0x0014,
685-
.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
686-
SYSC_HAS_EMUFREE | SYSC_HAS_ENAWAKEUP |
687-
SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
688-
SYSS_HAS_RESET_STATUS),
689-
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
690-
.sysc_fields = &omap_hwmod_sysc_type1,
691-
};
692-
693-
static struct omap_hwmod_class omap44xx_timer_1ms_hwmod_class = {
694-
.name = "timer",
695-
.sysc = &omap44xx_timer_1ms_sysc,
696-
};
697-
698-
/* timer1 */
699-
static struct omap_hwmod omap44xx_timer1_hwmod = {
700-
.name = "timer1",
701-
.class = &omap44xx_timer_1ms_hwmod_class,
702-
.clkdm_name = "l4_wkup_clkdm",
703-
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
704-
.main_clk = "dmt1_clk_mux",
705-
.prcm = {
706-
.omap4 = {
707-
.clkctrl_offs = OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET,
708-
.context_offs = OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET,
709-
.modulemode = MODULEMODE_SWCTRL,
710-
},
711-
},
712-
};
713-
714642
/*
715643
* 'usb_host_fs' class
716644
* full-speed usb host controller
@@ -1063,14 +991,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ocp_wp_noc = {
1063991
.user = OCP_USER_MPU | OCP_USER_SDMA,
1064992
};
1065993

1066-
/* l4_wkup -> counter_32k */
1067-
static struct omap_hwmod_ocp_if omap44xx_l4_wkup__counter_32k = {
1068-
.master = &omap44xx_l4_wkup_hwmod,
1069-
.slave = &omap44xx_counter_32k_hwmod,
1070-
.clk = "l4_wkup_clk_mux_ck",
1071-
.user = OCP_USER_MPU | OCP_USER_SDMA,
1072-
};
1073-
1074994
/* l4_cfg -> ctrl_module_core */
1075995
static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ctrl_module_core = {
1076996
.master = &omap44xx_l4_cfg_hwmod,
@@ -1199,14 +1119,6 @@ static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l3_main_2__sl2if = {
11991119
.user = OCP_USER_MPU | OCP_USER_SDMA,
12001120
};
12011121

1202-
/* l4_wkup -> timer1 */
1203-
static struct omap_hwmod_ocp_if omap44xx_l4_wkup__timer1 = {
1204-
.master = &omap44xx_l4_wkup_hwmod,
1205-
.slave = &omap44xx_timer1_hwmod,
1206-
.clk = "l4_wkup_clk_mux_ck",
1207-
.user = OCP_USER_MPU | OCP_USER_SDMA,
1208-
};
1209-
12101122
/* l4_cfg -> usb_host_fs */
12111123
static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_cfg__usb_host_fs = {
12121124
.master = &omap44xx_l4_cfg_hwmod,
@@ -1273,7 +1185,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
12731185
&omap44xx_l4_cfg__l4_wkup,
12741186
&omap44xx_mpu__mpu_private,
12751187
&omap44xx_l4_cfg__ocp_wp_noc,
1276-
&omap44xx_l4_wkup__counter_32k,
12771188
&omap44xx_l4_cfg__ctrl_module_core,
12781189
&omap44xx_l4_cfg__ctrl_module_pad_core,
12791190
&omap44xx_l4_wkup__ctrl_module_wkup,
@@ -1290,7 +1201,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
12901201
&omap44xx_l4_wkup__prm,
12911202
&omap44xx_l4_wkup__scrm,
12921203
/* &omap44xx_l3_main_2__sl2if, */
1293-
&omap44xx_l4_wkup__timer1,
12941204
/* &omap44xx_l4_cfg__usb_host_fs, */
12951205
&omap44xx_l4_cfg__usb_host_hs,
12961206
&omap44xx_l4_cfg__usb_tll_hs,

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