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davem330davem330
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Merge branch 'qcom-emac-more-ethtool'
Timur Tabi says: ==================== net: qcom/emac: add the last ethtool functions These two patches implement the remaining two ethtool functions that are of interest to the Qualcomm EMAC driver. These are the last patches that will be submitted for the 4.11 merge window. ==================== Signed-off-by: David S. Miller <[email protected]>
2 parents 15c2e10 + 038b940 commit 165f1cc

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3 files changed

+143
-81
lines changed

3 files changed

+143
-81
lines changed

‎drivers/net/ethernet/qualcomm/emac/emac-ethtool.c

Lines changed: 64 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -145,6 +145,29 @@ static void emac_get_ringparam(struct net_device *netdev,
145145
ring->tx_pending = adpt->tx_desc_cnt;
146146
}
147147

148+
static int emac_set_ringparam(struct net_device *netdev,
149+
struct ethtool_ringparam *ring)
150+
{
151+
struct emac_adapter *adpt = netdev_priv(netdev);
152+
153+
/* We don't have separate queues/rings for small/large frames, so
154+
* reject any attempt to specify those values separately.
155+
*/
156+
if (ring->rx_mini_pending || ring->rx_jumbo_pending)
157+
return -EINVAL;
158+
159+
adpt->tx_desc_cnt =
160+
clamp_val(ring->tx_pending, EMAC_MIN_TX_DESCS, EMAC_MAX_TX_DESCS);
161+
162+
adpt->rx_desc_cnt =
163+
clamp_val(ring->rx_pending, EMAC_MIN_RX_DESCS, EMAC_MAX_RX_DESCS);
164+
165+
if (netif_running(netdev))
166+
return emac_reinit_locked(adpt);
167+
168+
return 0;
169+
}
170+
148171
static void emac_get_pauseparam(struct net_device *netdev,
149172
struct ethtool_pauseparam *pause)
150173
{
@@ -170,6 +193,43 @@ static int emac_set_pauseparam(struct net_device *netdev,
170193
return 0;
171194
}
172195

196+
/* Selected registers that might want to track during runtime. */
197+
static const u16 emac_regs[] = {
198+
EMAC_DMA_MAS_CTRL,
199+
EMAC_MAC_CTRL,
200+
EMAC_TXQ_CTRL_0,
201+
EMAC_RXQ_CTRL_0,
202+
EMAC_DMA_CTRL,
203+
EMAC_INT_MASK,
204+
EMAC_AXI_MAST_CTRL,
205+
EMAC_CORE_HW_VERSION,
206+
EMAC_MISC_CTRL,
207+
};
208+
209+
/* Every time emac_regs[] above is changed, increase this version number. */
210+
#define EMAC_REGS_VERSION 0
211+
212+
#define EMAC_MAX_REG_SIZE ARRAY_SIZE(emac_regs)
213+
214+
static void emac_get_regs(struct net_device *netdev,
215+
struct ethtool_regs *regs, void *buff)
216+
{
217+
struct emac_adapter *adpt = netdev_priv(netdev);
218+
u32 *val = buff;
219+
unsigned int i;
220+
221+
regs->version = EMAC_REGS_VERSION;
222+
regs->len = EMAC_MAX_REG_SIZE * sizeof(u32);
223+
224+
for (i = 0; i < EMAC_MAX_REG_SIZE; i++)
225+
val[i] = readl(adpt->base + emac_regs[i]);
226+
}
227+
228+
static int emac_get_regs_len(struct net_device *netdev)
229+
{
230+
return EMAC_MAX_REG_SIZE * sizeof(32);
231+
}
232+
173233
static const struct ethtool_ops emac_ethtool_ops = {
174234
.get_link_ksettings = phy_ethtool_get_link_ksettings,
175235
.set_link_ksettings = phy_ethtool_set_link_ksettings,
@@ -182,13 +242,17 @@ static const struct ethtool_ops emac_ethtool_ops = {
182242
.get_ethtool_stats = emac_get_ethtool_stats,
183243

184244
.get_ringparam = emac_get_ringparam,
245+
.set_ringparam = emac_set_ringparam,
185246

186247
.get_pauseparam = emac_get_pauseparam,
187248
.set_pauseparam = emac_set_pauseparam,
188249

189250
.nway_reset = emac_nway_reset,
190251

191252
.get_link = ethtool_op_get_link,
253+
254+
.get_regs_len = emac_get_regs_len,
255+
.get_regs = emac_get_regs,
192256
};
193257

194258
void emac_set_ethtool_ops(struct net_device *netdev)

‎drivers/net/ethernet/qualcomm/emac/emac-mac.c

Lines changed: 0 additions & 52 deletions
Original file line numberDiff line numberDiff line change
@@ -25,58 +25,6 @@
2525
#include "emac.h"
2626
#include "emac-sgmii.h"
2727

28-
/* EMAC base register offsets */
29-
#define EMAC_MAC_CTRL 0x001480
30-
#define EMAC_WOL_CTRL0 0x0014a0
31-
#define EMAC_RSS_KEY0 0x0014b0
32-
#define EMAC_H1TPD_BASE_ADDR_LO 0x0014e0
33-
#define EMAC_H2TPD_BASE_ADDR_LO 0x0014e4
34-
#define EMAC_H3TPD_BASE_ADDR_LO 0x0014e8
35-
#define EMAC_INTER_SRAM_PART9 0x001534
36-
#define EMAC_DESC_CTRL_0 0x001540
37-
#define EMAC_DESC_CTRL_1 0x001544
38-
#define EMAC_DESC_CTRL_2 0x001550
39-
#define EMAC_DESC_CTRL_10 0x001554
40-
#define EMAC_DESC_CTRL_12 0x001558
41-
#define EMAC_DESC_CTRL_13 0x00155c
42-
#define EMAC_DESC_CTRL_3 0x001560
43-
#define EMAC_DESC_CTRL_4 0x001564
44-
#define EMAC_DESC_CTRL_5 0x001568
45-
#define EMAC_DESC_CTRL_14 0x00156c
46-
#define EMAC_DESC_CTRL_15 0x001570
47-
#define EMAC_DESC_CTRL_16 0x001574
48-
#define EMAC_DESC_CTRL_6 0x001578
49-
#define EMAC_DESC_CTRL_8 0x001580
50-
#define EMAC_DESC_CTRL_9 0x001584
51-
#define EMAC_DESC_CTRL_11 0x001588
52-
#define EMAC_TXQ_CTRL_0 0x001590
53-
#define EMAC_TXQ_CTRL_1 0x001594
54-
#define EMAC_TXQ_CTRL_2 0x001598
55-
#define EMAC_RXQ_CTRL_0 0x0015a0
56-
#define EMAC_RXQ_CTRL_1 0x0015a4
57-
#define EMAC_RXQ_CTRL_2 0x0015a8
58-
#define EMAC_RXQ_CTRL_3 0x0015ac
59-
#define EMAC_BASE_CPU_NUMBER 0x0015b8
60-
#define EMAC_DMA_CTRL 0x0015c0
61-
#define EMAC_MAILBOX_0 0x0015e0
62-
#define EMAC_MAILBOX_5 0x0015e4
63-
#define EMAC_MAILBOX_6 0x0015e8
64-
#define EMAC_MAILBOX_13 0x0015ec
65-
#define EMAC_MAILBOX_2 0x0015f4
66-
#define EMAC_MAILBOX_3 0x0015f8
67-
#define EMAC_MAILBOX_11 0x00160c
68-
#define EMAC_AXI_MAST_CTRL 0x001610
69-
#define EMAC_MAILBOX_12 0x001614
70-
#define EMAC_MAILBOX_9 0x001618
71-
#define EMAC_MAILBOX_10 0x00161c
72-
#define EMAC_ATHR_HEADER_CTRL 0x001620
73-
#define EMAC_CLK_GATE_CTRL 0x001814
74-
#define EMAC_MISC_CTRL 0x001990
75-
#define EMAC_MAILBOX_7 0x0019e0
76-
#define EMAC_MAILBOX_8 0x0019e4
77-
#define EMAC_MAILBOX_15 0x001bd4
78-
#define EMAC_MAILBOX_16 0x001bd8
79-
8028
/* EMAC_MAC_CTRL */
8129
#define SINGLE_PAUSE_MODE 0x10000000
8230
#define DEBUG_MODE 0x08000000

‎drivers/net/ethernet/qualcomm/emac/emac.h

Lines changed: 79 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -22,35 +22,85 @@
2222
#include "emac-sgmii.h"
2323

2424
/* EMAC base register offsets */
25-
#define EMAC_DMA_MAS_CTRL 0x001400
26-
#define EMAC_IRQ_MOD_TIM_INIT 0x001408
27-
#define EMAC_BLK_IDLE_STS 0x00140c
28-
#define EMAC_PHY_LINK_DELAY 0x00141c
29-
#define EMAC_SYS_ALIV_CTRL 0x001434
30-
#define EMAC_MAC_IPGIFG_CTRL 0x001484
31-
#define EMAC_MAC_STA_ADDR0 0x001488
32-
#define EMAC_MAC_STA_ADDR1 0x00148c
33-
#define EMAC_HASH_TAB_REG0 0x001490
34-
#define EMAC_HASH_TAB_REG1 0x001494
35-
#define EMAC_MAC_HALF_DPLX_CTRL 0x001498
36-
#define EMAC_MAX_FRAM_LEN_CTRL 0x00149c
37-
#define EMAC_INT_STATUS 0x001600
38-
#define EMAC_INT_MASK 0x001604
39-
#define EMAC_RXMAC_STATC_REG0 0x001700
40-
#define EMAC_RXMAC_STATC_REG22 0x001758
41-
#define EMAC_TXMAC_STATC_REG0 0x001760
42-
#define EMAC_TXMAC_STATC_REG24 0x0017c0
43-
#define EMAC_CORE_HW_VERSION 0x001974
44-
#define EMAC_IDT_TABLE0 0x001b00
45-
#define EMAC_RXMAC_STATC_REG23 0x001bc8
46-
#define EMAC_RXMAC_STATC_REG24 0x001bcc
47-
#define EMAC_TXMAC_STATC_REG25 0x001bd0
48-
#define EMAC_INT1_MASK 0x001bf0
49-
#define EMAC_INT1_STATUS 0x001bf4
50-
#define EMAC_INT2_MASK 0x001bf8
51-
#define EMAC_INT2_STATUS 0x001bfc
52-
#define EMAC_INT3_MASK 0x001c00
53-
#define EMAC_INT3_STATUS 0x001c04
25+
#define EMAC_DMA_MAS_CTRL 0x1400
26+
#define EMAC_IRQ_MOD_TIM_INIT 0x1408
27+
#define EMAC_BLK_IDLE_STS 0x140c
28+
#define EMAC_PHY_LINK_DELAY 0x141c
29+
#define EMAC_SYS_ALIV_CTRL 0x1434
30+
#define EMAC_MAC_CTRL 0x1480
31+
#define EMAC_MAC_IPGIFG_CTRL 0x1484
32+
#define EMAC_MAC_STA_ADDR0 0x1488
33+
#define EMAC_MAC_STA_ADDR1 0x148c
34+
#define EMAC_HASH_TAB_REG0 0x1490
35+
#define EMAC_HASH_TAB_REG1 0x1494
36+
#define EMAC_MAC_HALF_DPLX_CTRL 0x1498
37+
#define EMAC_MAX_FRAM_LEN_CTRL 0x149c
38+
#define EMAC_WOL_CTRL0 0x14a0
39+
#define EMAC_RSS_KEY0 0x14b0
40+
#define EMAC_H1TPD_BASE_ADDR_LO 0x14e0
41+
#define EMAC_H2TPD_BASE_ADDR_LO 0x14e4
42+
#define EMAC_H3TPD_BASE_ADDR_LO 0x14e8
43+
#define EMAC_INTER_SRAM_PART9 0x1534
44+
#define EMAC_DESC_CTRL_0 0x1540
45+
#define EMAC_DESC_CTRL_1 0x1544
46+
#define EMAC_DESC_CTRL_2 0x1550
47+
#define EMAC_DESC_CTRL_10 0x1554
48+
#define EMAC_DESC_CTRL_12 0x1558
49+
#define EMAC_DESC_CTRL_13 0x155c
50+
#define EMAC_DESC_CTRL_3 0x1560
51+
#define EMAC_DESC_CTRL_4 0x1564
52+
#define EMAC_DESC_CTRL_5 0x1568
53+
#define EMAC_DESC_CTRL_14 0x156c
54+
#define EMAC_DESC_CTRL_15 0x1570
55+
#define EMAC_DESC_CTRL_16 0x1574
56+
#define EMAC_DESC_CTRL_6 0x1578
57+
#define EMAC_DESC_CTRL_8 0x1580
58+
#define EMAC_DESC_CTRL_9 0x1584
59+
#define EMAC_DESC_CTRL_11 0x1588
60+
#define EMAC_TXQ_CTRL_0 0x1590
61+
#define EMAC_TXQ_CTRL_1 0x1594
62+
#define EMAC_TXQ_CTRL_2 0x1598
63+
#define EMAC_RXQ_CTRL_0 0x15a0
64+
#define EMAC_RXQ_CTRL_1 0x15a4
65+
#define EMAC_RXQ_CTRL_2 0x15a8
66+
#define EMAC_RXQ_CTRL_3 0x15ac
67+
#define EMAC_BASE_CPU_NUMBER 0x15b8
68+
#define EMAC_DMA_CTRL 0x15c0
69+
#define EMAC_MAILBOX_0 0x15e0
70+
#define EMAC_MAILBOX_5 0x15e4
71+
#define EMAC_MAILBOX_6 0x15e8
72+
#define EMAC_MAILBOX_13 0x15ec
73+
#define EMAC_MAILBOX_2 0x15f4
74+
#define EMAC_MAILBOX_3 0x15f8
75+
#define EMAC_INT_STATUS 0x1600
76+
#define EMAC_INT_MASK 0x1604
77+
#define EMAC_MAILBOX_11 0x160c
78+
#define EMAC_AXI_MAST_CTRL 0x1610
79+
#define EMAC_MAILBOX_12 0x1614
80+
#define EMAC_MAILBOX_9 0x1618
81+
#define EMAC_MAILBOX_10 0x161c
82+
#define EMAC_ATHR_HEADER_CTRL 0x1620
83+
#define EMAC_RXMAC_STATC_REG0 0x1700
84+
#define EMAC_RXMAC_STATC_REG22 0x1758
85+
#define EMAC_TXMAC_STATC_REG0 0x1760
86+
#define EMAC_TXMAC_STATC_REG24 0x17c0
87+
#define EMAC_CLK_GATE_CTRL 0x1814
88+
#define EMAC_CORE_HW_VERSION 0x1974
89+
#define EMAC_MISC_CTRL 0x1990
90+
#define EMAC_MAILBOX_7 0x19e0
91+
#define EMAC_MAILBOX_8 0x19e4
92+
#define EMAC_IDT_TABLE0 0x1b00
93+
#define EMAC_RXMAC_STATC_REG23 0x1bc8
94+
#define EMAC_RXMAC_STATC_REG24 0x1bcc
95+
#define EMAC_TXMAC_STATC_REG25 0x1bd0
96+
#define EMAC_MAILBOX_15 0x1bd4
97+
#define EMAC_MAILBOX_16 0x1bd8
98+
#define EMAC_INT1_MASK 0x1bf0
99+
#define EMAC_INT1_STATUS 0x1bf4
100+
#define EMAC_INT2_MASK 0x1bf8
101+
#define EMAC_INT2_STATUS 0x1bfc
102+
#define EMAC_INT3_MASK 0x1c00
103+
#define EMAC_INT3_STATUS 0x1c04
54104

55105
/* EMAC_DMA_MAS_CTRL */
56106
#define DEV_ID_NUM_BMSK 0x7f000000

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