Skip to content

Commit 1c0cf6d

Browse files
ardbiesheuvelherbertx
authored andcommitted
crypto: arm64/neonbs - fix out-of-bounds access on short input
The bit-sliced implementation of AES-CTR operates on blocks of 128 bytes, and will fall back to the plain NEON version for tail blocks or inputs that are shorter than 128 bytes to begin with. It will call straight into the plain NEON asm helper, which performs all memory accesses in granules of 16 bytes (the size of a NEON register). For this reason, the associated plain NEON glue code will copy inputs shorter than 16 bytes into a temporary buffer, given that this is a rare occurrence and it is not worth the effort to work around this in the asm code. The fallback from the bit-sliced NEON version fails to take this into account, potentially resulting in out-of-bounds accesses. So clone the same workaround, and use a temp buffer for short in/outputs. Fixes: fc074e1 ("crypto: arm64/aes-neonbs-ctr - fallback to plain NEON for final chunk") Cc: <[email protected]> Reported-by: [email protected] Reviewed-by: Eric Biggers <[email protected]> Signed-off-by: Ard Biesheuvel <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
1 parent 7cfc2ab commit 1c0cf6d

File tree

1 file changed

+11
-0
lines changed

1 file changed

+11
-0
lines changed

arch/arm64/crypto/aes-neonbs-glue.c

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -227,8 +227,19 @@ static int ctr_encrypt(struct skcipher_request *req)
227227
src += blocks * AES_BLOCK_SIZE;
228228
}
229229
if (nbytes && walk.nbytes == walk.total) {
230+
u8 buf[AES_BLOCK_SIZE];
231+
u8 *d = dst;
232+
233+
if (unlikely(nbytes < AES_BLOCK_SIZE))
234+
src = dst = memcpy(buf + sizeof(buf) - nbytes,
235+
src, nbytes);
236+
230237
neon_aes_ctr_encrypt(dst, src, ctx->enc, ctx->key.rounds,
231238
nbytes, walk.iv);
239+
240+
if (unlikely(nbytes < AES_BLOCK_SIZE))
241+
memcpy(d, dst, nbytes);
242+
232243
nbytes = 0;
233244
}
234245
kernel_neon_end();

0 commit comments

Comments
 (0)