Skip to content

Commit 1c17ae8

Browse files
Divy Le RayDavid S. Miller
authored andcommitted
cxgb3 - Set the CQ_ERR bit in CQ contexts.
The cxgb3 driver is incorrectly configuring the HW CQ context for CQ's that use overflow-avoidance. Namely the RDMA control CQ. This results in a bad DMA from the device to bus address 0. The solution is to set the CQ_ERR bit in the context for these types of CQs. Signed-off-by: Divy Le Ray <[email protected]> Signed-off-by: Jeff Garzik <[email protected]>
1 parent b4687ff commit 1c17ae8

File tree

2 files changed

+6
-1
lines changed

2 files changed

+6
-1
lines changed

drivers/net/cxgb3/sge_defs.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -106,6 +106,10 @@
106106
#define V_CQ_GEN(x) ((x) << S_CQ_GEN)
107107
#define F_CQ_GEN V_CQ_GEN(1U)
108108

109+
#define S_CQ_ERR 30
110+
#define V_CQ_ERR(x) ((x) << S_CQ_ERR)
111+
#define F_CQ_ERR V_CQ_ERR(1U)
112+
109113
#define S_CQ_OVERFLOW_MODE 31
110114
#define V_CQ_OVERFLOW_MODE(x) ((x) << S_CQ_OVERFLOW_MODE)
111115
#define F_CQ_OVERFLOW_MODE V_CQ_OVERFLOW_MODE(1U)

drivers/net/cxgb3/t3_hw.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2046,7 +2046,8 @@ int t3_sge_init_cqcntxt(struct adapter *adapter, unsigned int id, u64 base_addr,
20462046
base_addr >>= 32;
20472047
t3_write_reg(adapter, A_SG_CONTEXT_DATA2,
20482048
V_CQ_BASE_HI((u32) base_addr) | V_CQ_RSPQ(rspq) |
2049-
V_CQ_GEN(1) | V_CQ_OVERFLOW_MODE(ovfl_mode));
2049+
V_CQ_GEN(1) | V_CQ_OVERFLOW_MODE(ovfl_mode) |
2050+
V_CQ_ERR(ovfl_mode));
20502051
t3_write_reg(adapter, A_SG_CONTEXT_DATA3, V_CQ_CREDITS(credits) |
20512052
V_CQ_CREDIT_THRES(credit_thres));
20522053
return t3_sge_write_context(adapter, id, F_CQ);

0 commit comments

Comments
 (0)