|
171 | 171 | status = "disabled";
|
172 | 172 | };
|
173 | 173 |
|
| 174 | + mqs1: mqs1 { |
| 175 | + compatible = "fsl,imx93-mqs"; |
| 176 | + gpr = <&aonmix_ns_gpr>; |
| 177 | + status = "disabled"; |
| 178 | + }; |
| 179 | + |
| 180 | + mqs2: mqs2 { |
| 181 | + compatible = "fsl,imx93-mqs"; |
| 182 | + gpr = <&wakeupmix_gpr>; |
| 183 | + status = "disabled"; |
| 184 | + }; |
| 185 | + |
174 | 186 | soc@0 {
|
175 | 187 | compatible = "simple-bus";
|
176 | 188 | #address-cells = <1>;
|
|
367 | 379 | status = "disabled";
|
368 | 380 | };
|
369 | 381 |
|
| 382 | + sai1: sai@443b0000 { |
| 383 | + compatible = "fsl,imx93-sai"; |
| 384 | + reg = <0x443b0000 0x10000>; |
| 385 | + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; |
| 386 | + clocks = <&clk IMX93_CLK_SAI1_IPG>, <&clk IMX93_CLK_DUMMY>, |
| 387 | + <&clk IMX93_CLK_SAI1_GATE>, <&clk IMX93_CLK_DUMMY>, |
| 388 | + <&clk IMX93_CLK_DUMMY>; |
| 389 | + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; |
| 390 | + dmas = <&edma1 22 0 1>, <&edma1 21 0 0>; |
| 391 | + dma-names = "rx", "tx"; |
| 392 | + status = "disabled"; |
| 393 | + }; |
| 394 | + |
370 | 395 | iomuxc: pinctrl@443c0000 {
|
371 | 396 | compatible = "fsl,imx93-iomuxc";
|
372 | 397 | reg = <0x443c0000 0x10000>;
|
|
447 | 472 | #thermal-sensor-cells = <1>;
|
448 | 473 | };
|
449 | 474 |
|
| 475 | + micfil: micfil@44520000 { |
| 476 | + compatible = "fsl,imx93-micfil"; |
| 477 | + reg = <0x44520000 0x10000>; |
| 478 | + interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, |
| 479 | + <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, |
| 480 | + <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, |
| 481 | + <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; |
| 482 | + clocks = <&clk IMX93_CLK_PDM_IPG>, |
| 483 | + <&clk IMX93_CLK_PDM_GATE>, |
| 484 | + <&clk IMX93_CLK_AUDIO_PLL>, |
| 485 | + <&clk IMX93_CLK_DUMMY>; |
| 486 | + clock-names = "ipg_clk", "ipg_clk_app", |
| 487 | + "pll8k", "clkext3"; |
| 488 | + dmas = <&edma1 29 0 5>; |
| 489 | + dma-names = "rx"; |
| 490 | + status = "disabled"; |
| 491 | + }; |
450 | 492 |
|
451 | 493 | adc1: adc@44530000 {
|
452 | 494 | compatible = "nxp,imx93-adc";
|
|
738 | 780 | status = "disabled";
|
739 | 781 | };
|
740 | 782 |
|
| 783 | + sai2: sai@42650000 { |
| 784 | + compatible = "fsl,imx93-sai"; |
| 785 | + reg = <0x42650000 0x10000>; |
| 786 | + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; |
| 787 | + clocks = <&clk IMX93_CLK_SAI2_IPG>, <&clk IMX93_CLK_DUMMY>, |
| 788 | + <&clk IMX93_CLK_SAI2_GATE>, <&clk IMX93_CLK_DUMMY>, |
| 789 | + <&clk IMX93_CLK_DUMMY>; |
| 790 | + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; |
| 791 | + dmas = <&edma2 59 0 1>, <&edma2 58 0 0>; |
| 792 | + dma-names = "rx", "tx"; |
| 793 | + status = "disabled"; |
| 794 | + }; |
| 795 | + |
| 796 | + sai3: sai@42660000 { |
| 797 | + compatible = "fsl,imx93-sai"; |
| 798 | + reg = <0x42660000 0x10000>; |
| 799 | + interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; |
| 800 | + clocks = <&clk IMX93_CLK_SAI3_IPG>, <&clk IMX93_CLK_DUMMY>, |
| 801 | + <&clk IMX93_CLK_SAI3_GATE>, <&clk IMX93_CLK_DUMMY>, |
| 802 | + <&clk IMX93_CLK_DUMMY>; |
| 803 | + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; |
| 804 | + dmas = <&edma2 61 0 1>, <&edma2 60 0 0>; |
| 805 | + dma-names = "rx", "tx"; |
| 806 | + status = "disabled"; |
| 807 | + }; |
| 808 | + |
| 809 | + xcvr: xcvr@42680000 { |
| 810 | + compatible = "fsl,imx93-xcvr"; |
| 811 | + reg = <0x42680000 0x800>, |
| 812 | + <0x42680800 0x400>, |
| 813 | + <0x42680c00 0x080>, |
| 814 | + <0x42680e00 0x080>; |
| 815 | + reg-names = "ram", "regs", "rxfifo", "txfifo"; |
| 816 | + interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, |
| 817 | + <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>; |
| 818 | + clocks = <&clk IMX93_CLK_BUS_WAKEUP>, |
| 819 | + <&clk IMX93_CLK_SPDIF_GATE>, |
| 820 | + <&clk IMX93_CLK_DUMMY>, |
| 821 | + <&clk IMX93_CLK_AUD_XCVR_GATE>; |
| 822 | + clock-names = "ipg", "phy", "spba", "pll_ipg"; |
| 823 | + dmas = <&edma2 65 0 1>, <&edma2 66 0 0>; |
| 824 | + dma-names = "rx", "tx"; |
| 825 | + status = "disabled"; |
| 826 | + }; |
| 827 | + |
741 | 828 | lpuart7: serial@42690000 {
|
742 | 829 | compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
|
743 | 830 | reg = <0x42690000 0x1000>;
|
|
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