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Peter Zijlstra
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x86/xen: Make save_fl() noinstr
vmlinux.o: warning: objtool: pv_ops[30]: native_save_fl vmlinux.o: warning: objtool: pv_ops[30]: __raw_callee_save_xen_save_fl vmlinux.o: warning: objtool: pv_ops[30]: xen_save_fl_direct vmlinux.o: warning: objtool: lockdep_hardirqs_off()+0x73: call to pv_ops[30]() leaves .noinstr.text section Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Reviewed-by: Juergen Gross <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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4 files changed

+25
-20
lines changed

4 files changed

+25
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lines changed

arch/x86/include/asm/paravirt.h

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -653,10 +653,10 @@ bool __raw_callee_save___native_vcpu_is_preempted(long cpu);
653653
* functions.
654654
*/
655655
#define PV_THUNK_NAME(func) "__raw_callee_save_" #func
656-
#define PV_CALLEE_SAVE_REGS_THUNK(func) \
656+
#define __PV_CALLEE_SAVE_REGS_THUNK(func, section) \
657657
extern typeof(func) __raw_callee_save_##func; \
658658
\
659-
asm(".pushsection .text;" \
659+
asm(".pushsection " section ", \"ax\";" \
660660
".globl " PV_THUNK_NAME(func) ";" \
661661
".type " PV_THUNK_NAME(func) ", @function;" \
662662
PV_THUNK_NAME(func) ":" \
@@ -669,6 +669,9 @@ bool __raw_callee_save___native_vcpu_is_preempted(long cpu);
669669
".size " PV_THUNK_NAME(func) ", .-" PV_THUNK_NAME(func) ";" \
670670
".popsection")
671671

672+
#define PV_CALLEE_SAVE_REGS_THUNK(func) \
673+
__PV_CALLEE_SAVE_REGS_THUNK(func, ".text")
674+
672675
/* Get a reference to a callee-save function */
673676
#define PV_CALLEE_SAVE(func) \
674677
((struct paravirt_callee_save) { __raw_callee_save_##func })

arch/x86/kernel/irqflags.S

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,9 +7,11 @@
77
/*
88
* unsigned long native_save_fl(void)
99
*/
10+
.pushsection .noinstr.text, "ax"
1011
SYM_FUNC_START(native_save_fl)
1112
pushf
1213
pop %_ASM_AX
1314
ret
1415
SYM_FUNC_END(native_save_fl)
16+
.popsection
1517
EXPORT_SYMBOL(native_save_fl)

arch/x86/xen/irq.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@ void xen_force_evtchn_callback(void)
2424
(void)HYPERVISOR_xen_version(0, NULL);
2525
}
2626

27-
asmlinkage __visible unsigned long xen_save_fl(void)
27+
asmlinkage __visible noinstr unsigned long xen_save_fl(void)
2828
{
2929
struct vcpu_info *vcpu;
3030
unsigned long flags;
@@ -40,7 +40,7 @@ asmlinkage __visible unsigned long xen_save_fl(void)
4040
*/
4141
return (-flags) & X86_EFLAGS_IF;
4242
}
43-
PV_CALLEE_SAVE_REGS_THUNK(xen_save_fl);
43+
__PV_CALLEE_SAVE_REGS_THUNK(xen_save_fl, ".noinstr.text");
4444

4545
asmlinkage __visible void xen_irq_disable(void)
4646
{

arch/x86/xen/xen-asm.S

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -57,22 +57,6 @@ SYM_FUNC_START(xen_irq_disable_direct)
5757
ret
5858
SYM_FUNC_END(xen_irq_disable_direct)
5959

60-
/*
61-
* (xen_)save_fl is used to get the current interrupt enable status.
62-
* Callers expect the status to be in X86_EFLAGS_IF, and other bits
63-
* may be set in the return value. We take advantage of this by
64-
* making sure that X86_EFLAGS_IF has the right value (and other bits
65-
* in that byte are 0), but other bits in the return value are
66-
* undefined. We need to toggle the state of the bit, because Xen and
67-
* x86 use opposite senses (mask vs enable).
68-
*/
69-
SYM_FUNC_START(xen_save_fl_direct)
70-
testb $0xff, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask
71-
setz %ah
72-
addb %ah, %ah
73-
ret
74-
SYM_FUNC_END(xen_save_fl_direct)
75-
7660
/*
7761
* Force an event check by making a hypercall, but preserve regs
7862
* before making the call.
@@ -103,6 +87,22 @@ SYM_FUNC_START(check_events)
10387
SYM_FUNC_END(check_events)
10488

10589
.pushsection .noinstr.text, "ax"
90+
/*
91+
* (xen_)save_fl is used to get the current interrupt enable status.
92+
* Callers expect the status to be in X86_EFLAGS_IF, and other bits
93+
* may be set in the return value. We take advantage of this by
94+
* making sure that X86_EFLAGS_IF has the right value (and other bits
95+
* in that byte are 0), but other bits in the return value are
96+
* undefined. We need to toggle the state of the bit, because Xen and
97+
* x86 use opposite senses (mask vs enable).
98+
*/
99+
SYM_FUNC_START(xen_save_fl_direct)
100+
testb $0xff, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask
101+
setz %ah
102+
addb %ah, %ah
103+
ret
104+
SYM_FUNC_END(xen_save_fl_direct)
105+
106106
SYM_FUNC_START(xen_read_cr2)
107107
FRAME_BEGIN
108108
_ASM_MOV PER_CPU_VAR(xen_vcpu), %_ASM_AX

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