@@ -122,7 +122,8 @@ static const struct iio_chan_spec ad7746_channels[] = {
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.indexed = 1 ,
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.channel = 0 ,
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.info_mask_separate = BIT (IIO_CHAN_INFO_RAW ),
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- .info_mask_shared_by_type = BIT (IIO_CHAN_INFO_SCALE ),
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+ .info_mask_shared_by_type = BIT (IIO_CHAN_INFO_SCALE ) |
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+ BIT (IIO_CHAN_INFO_SAMP_FREQ ),
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.address = AD7746_REG_VT_DATA_HIGH << 8 |
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AD7746_VTSETUP_VTMD_EXT_VIN ,
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},
@@ -132,7 +133,8 @@ static const struct iio_chan_spec ad7746_channels[] = {
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.channel = 1 ,
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.extend_name = "supply" ,
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.info_mask_separate = BIT (IIO_CHAN_INFO_RAW ),
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- .info_mask_shared_by_type = BIT (IIO_CHAN_INFO_SCALE ),
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+ .info_mask_shared_by_type = BIT (IIO_CHAN_INFO_SCALE ) |
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+ BIT (IIO_CHAN_INFO_SAMP_FREQ ),
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.address = AD7746_REG_VT_DATA_HIGH << 8 |
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AD7746_VTSETUP_VTMD_VDD_MON ,
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},
@@ -159,7 +161,7 @@ static const struct iio_chan_spec ad7746_channels[] = {
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.info_mask_separate = BIT (IIO_CHAN_INFO_RAW ) |
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BIT (IIO_CHAN_INFO_CALIBSCALE ) | BIT (IIO_CHAN_INFO_OFFSET ),
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.info_mask_shared_by_type = BIT (IIO_CHAN_INFO_CALIBBIAS ) |
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- BIT (IIO_CHAN_INFO_SCALE ),
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+ BIT (IIO_CHAN_INFO_SCALE ) | BIT ( IIO_CHAN_INFO_SAMP_FREQ ) ,
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.address = AD7746_REG_CAP_DATA_HIGH << 8 ,
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},
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[CIN1_DIFF ] = {
@@ -171,7 +173,7 @@ static const struct iio_chan_spec ad7746_channels[] = {
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.info_mask_separate = BIT (IIO_CHAN_INFO_RAW ) |
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BIT (IIO_CHAN_INFO_CALIBSCALE ) | BIT (IIO_CHAN_INFO_OFFSET ),
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.info_mask_shared_by_type = BIT (IIO_CHAN_INFO_CALIBBIAS ) |
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- BIT (IIO_CHAN_INFO_SCALE ),
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+ BIT (IIO_CHAN_INFO_SCALE ) | BIT ( IIO_CHAN_INFO_SAMP_FREQ ) ,
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.address = AD7746_REG_CAP_DATA_HIGH << 8 |
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AD7746_CAPSETUP_CAPDIFF
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},
@@ -182,7 +184,7 @@ static const struct iio_chan_spec ad7746_channels[] = {
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.info_mask_separate = BIT (IIO_CHAN_INFO_RAW ) |
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BIT (IIO_CHAN_INFO_CALIBSCALE ) | BIT (IIO_CHAN_INFO_OFFSET ),
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.info_mask_shared_by_type = BIT (IIO_CHAN_INFO_CALIBBIAS ) |
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- BIT (IIO_CHAN_INFO_SCALE ),
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+ BIT (IIO_CHAN_INFO_SCALE ) | BIT ( IIO_CHAN_INFO_SAMP_FREQ ) ,
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.address = AD7746_REG_CAP_DATA_HIGH << 8 |
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AD7746_CAPSETUP_CIN2 ,
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},
@@ -195,7 +197,7 @@ static const struct iio_chan_spec ad7746_channels[] = {
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.info_mask_separate = BIT (IIO_CHAN_INFO_RAW ) |
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BIT (IIO_CHAN_INFO_CALIBSCALE ) | BIT (IIO_CHAN_INFO_OFFSET ),
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.info_mask_shared_by_type = BIT (IIO_CHAN_INFO_CALIBBIAS ) |
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- BIT (IIO_CHAN_INFO_SCALE ),
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+ BIT (IIO_CHAN_INFO_SCALE ) | BIT ( IIO_CHAN_INFO_SAMP_FREQ ) ,
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.address = AD7746_REG_CAP_DATA_HIGH << 8 |
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AD7746_CAPSETUP_CAPDIFF | AD7746_CAPSETUP_CIN2 ,
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}
@@ -355,101 +357,47 @@ static IIO_DEVICE_ATTR(in_capacitance1_calibscale_calibration,
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static IIO_DEVICE_ATTR (in_voltage0_calibscale_calibration ,
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S_IWUSR , NULL, ad7746_start_gain_calib , VIN ) ;
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- static ssize_t ad7746_show_cap_filter_rate_setup (struct device * dev ,
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- struct device_attribute * attr ,
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- char * buf )
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+ static int ad7746_store_cap_filter_rate_setup (struct ad7746_chip_info * chip ,
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+ int val )
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{
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- struct iio_dev * indio_dev = dev_to_iio_dev (dev );
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- struct ad7746_chip_info * chip = iio_priv (indio_dev );
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-
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- return sprintf (buf , "%d\n" , ad7746_cap_filter_rate_table [
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- (chip -> config >> 3 ) & 0x7 ][0 ]);
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- }
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-
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- static ssize_t ad7746_store_cap_filter_rate_setup (struct device * dev ,
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- struct device_attribute * attr ,
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- const char * buf ,
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- size_t len )
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- {
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- struct iio_dev * indio_dev = dev_to_iio_dev (dev );
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- struct ad7746_chip_info * chip = iio_priv (indio_dev );
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- u8 data ;
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- int ret , i ;
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-
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- ret = kstrtou8 (buf , 10 , & data );
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- if (ret < 0 )
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- return ret ;
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+ int i ;
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for (i = 0 ; i < ARRAY_SIZE (ad7746_cap_filter_rate_table ); i ++ )
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- if (data >= ad7746_cap_filter_rate_table [i ][0 ])
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+ if (val >= ad7746_cap_filter_rate_table [i ][0 ])
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break ;
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if (i >= ARRAY_SIZE (ad7746_cap_filter_rate_table ))
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i = ARRAY_SIZE (ad7746_cap_filter_rate_table ) - 1 ;
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- mutex_lock (& indio_dev -> mlock );
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chip -> config &= ~AD7746_CONF_CAPFS (0x7 );
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chip -> config |= AD7746_CONF_CAPFS (i );
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- mutex_unlock (& indio_dev -> mlock );
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- return len ;
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+ return 0 ;
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}
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- static ssize_t ad7746_show_vt_filter_rate_setup (struct device * dev ,
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- struct device_attribute * attr ,
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- char * buf )
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+ static int ad7746_store_vt_filter_rate_setup (struct ad7746_chip_info * chip ,
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+ int val )
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{
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- struct iio_dev * indio_dev = dev_to_iio_dev (dev );
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- struct ad7746_chip_info * chip = iio_priv (indio_dev );
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-
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- return sprintf (buf , "%d\n" , ad7746_vt_filter_rate_table [
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- (chip -> config >> 6 ) & 0x3 ][0 ]);
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- }
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-
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- static ssize_t ad7746_store_vt_filter_rate_setup (struct device * dev ,
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- struct device_attribute * attr ,
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- const char * buf ,
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- size_t len )
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- {
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- struct iio_dev * indio_dev = dev_to_iio_dev (dev );
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- struct ad7746_chip_info * chip = iio_priv (indio_dev );
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- u8 data ;
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- int ret , i ;
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-
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- ret = kstrtou8 (buf , 10 , & data );
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- if (ret < 0 )
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- return ret ;
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+ int i ;
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for (i = 0 ; i < ARRAY_SIZE (ad7746_vt_filter_rate_table ); i ++ )
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- if (data >= ad7746_vt_filter_rate_table [i ][0 ])
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+ if (val >= ad7746_vt_filter_rate_table [i ][0 ])
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break ;
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if (i >= ARRAY_SIZE (ad7746_vt_filter_rate_table ))
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i = ARRAY_SIZE (ad7746_vt_filter_rate_table ) - 1 ;
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- mutex_lock (& indio_dev -> mlock );
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chip -> config &= ~AD7746_CONF_VTFS (0x3 );
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chip -> config |= AD7746_CONF_VTFS (i );
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- mutex_unlock (& indio_dev -> mlock );
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- return len ;
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+ return 0 ;
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}
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- static IIO_DEVICE_ATTR (in_capacitance_sampling_frequency ,
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- S_IRUGO | S_IWUSR , ad7746_show_cap_filter_rate_setup ,
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- ad7746_store_cap_filter_rate_setup , 0 ) ;
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-
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- static IIO_DEVICE_ATTR (in_voltage_sampling_frequency ,
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- S_IRUGO | S_IWUSR , ad7746_show_vt_filter_rate_setup ,
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- ad7746_store_vt_filter_rate_setup , 0 ) ;
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-
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static IIO_CONST_ATTR (in_voltage_sampling_frequency_available , "50 31 16 8" );
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static IIO_CONST_ATTR (in_capacitance_sampling_frequency_available ,
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"91 84 50 26 16 13 11 9" );
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static struct attribute * ad7746_attributes [] = {
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- & iio_dev_attr_in_capacitance_sampling_frequency .dev_attr .attr ,
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- & iio_dev_attr_in_voltage_sampling_frequency .dev_attr .attr ,
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& iio_dev_attr_in_capacitance0_calibbias_calibration .dev_attr .attr ,
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& iio_dev_attr_in_capacitance0_calibscale_calibration .dev_attr .attr ,
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& iio_dev_attr_in_capacitance1_calibscale_calibration .dev_attr .attr ,
@@ -547,6 +495,23 @@ static int ad7746_write_raw(struct iio_dev *indio_dev,
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ret = 0 ;
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break ;
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+ case IIO_CHAN_INFO_SAMP_FREQ :
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+ if (val2 ) {
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+ ret = - EINVAL ;
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+ goto out ;
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+ }
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+
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+ switch (chan -> type ) {
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+ case IIO_CAPACITANCE :
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+ ret = ad7746_store_cap_filter_rate_setup (chip , val );
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+ break ;
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+ case IIO_VOLTAGE :
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+ ret = ad7746_store_vt_filter_rate_setup (chip , val );
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+ break ;
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+ default :
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+ ret = - EINVAL ;
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+ }
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+ break ;
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default :
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ret = - EINVAL ;
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}
@@ -666,6 +631,21 @@ static int ad7746_read_raw(struct iio_dev *indio_dev,
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break ;
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}
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+ break ;
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+ case IIO_CHAN_INFO_SAMP_FREQ :
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+ switch (chan -> type ) {
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+ case IIO_CAPACITANCE :
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+ * val = ad7746_cap_filter_rate_table [
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+ (chip -> config >> 3 ) & 0x7 ][0 ];
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+ ret = IIO_VAL_INT ;
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+ break ;
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+ case IIO_VOLTAGE :
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+ * val = ad7746_vt_filter_rate_table [
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+ (chip -> config >> 6 ) & 0x3 ][0 ];
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+ break ;
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+ default :
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+ ret = - EINVAL ;
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+ }
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break ;
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default :
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ret = - EINVAL ;
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