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Richard Röjforstorvalds
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timbuart: Fix for tx_empty
Hardware updated to support TX FIFO empty. Signed-off-by: Richard Röjfors <[email protected]> Signed-off-by: Alan Cox <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
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drivers/serial/timbuart.c

Lines changed: 25 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -33,29 +33,29 @@ struct timbuart_port {
3333
struct uart_port port;
3434
struct tasklet_struct tasklet;
3535
int usedma;
36-
u8 last_ier;
36+
u32 last_ier;
3737
struct platform_device *dev;
3838
};
3939

4040
static int baudrates[] = {9600, 19200, 38400, 57600, 115200, 230400, 460800,
4141
921600, 1843200, 3250000};
4242

43-
static void timbuart_mctrl_check(struct uart_port *port, u8 isr, u8 *ier);
43+
static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier);
4444

4545
static irqreturn_t timbuart_handleinterrupt(int irq, void *devid);
4646

4747
static void timbuart_stop_rx(struct uart_port *port)
4848
{
4949
/* spin lock held by upper layer, disable all RX interrupts */
50-
u8 ier = ioread8(port->membase + TIMBUART_IER) & ~RXFLAGS;
51-
iowrite8(ier, port->membase + TIMBUART_IER);
50+
u32 ier = ioread32(port->membase + TIMBUART_IER) & ~RXFLAGS;
51+
iowrite32(ier, port->membase + TIMBUART_IER);
5252
}
5353

5454
static void timbuart_stop_tx(struct uart_port *port)
5555
{
5656
/* spinlock held by upper layer, disable TX interrupt */
57-
u8 ier = ioread8(port->membase + TIMBUART_IER) & ~TXBAE;
58-
iowrite8(ier, port->membase + TIMBUART_IER);
57+
u32 ier = ioread32(port->membase + TIMBUART_IER) & ~TXBAE;
58+
iowrite32(ier, port->membase + TIMBUART_IER);
5959
}
6060

6161
static void timbuart_start_tx(struct uart_port *port)
@@ -72,14 +72,14 @@ static void timbuart_flush_buffer(struct uart_port *port)
7272
u8 ctl = ioread8(port->membase + TIMBUART_CTRL) | TIMBUART_CTRL_FLSHTX;
7373

7474
iowrite8(ctl, port->membase + TIMBUART_CTRL);
75-
iowrite8(TXBF, port->membase + TIMBUART_ISR);
75+
iowrite32(TXBF, port->membase + TIMBUART_ISR);
7676
}
7777

7878
static void timbuart_rx_chars(struct uart_port *port)
7979
{
8080
struct tty_struct *tty = port->info->port.tty;
8181

82-
while (ioread8(port->membase + TIMBUART_ISR) & RXDP) {
82+
while (ioread32(port->membase + TIMBUART_ISR) & RXDP) {
8383
u8 ch = ioread8(port->membase + TIMBUART_RXFIFO);
8484
port->icount.rx++;
8585
tty_insert_flip_char(tty, ch, TTY_NORMAL);
@@ -97,7 +97,7 @@ static void timbuart_tx_chars(struct uart_port *port)
9797
{
9898
struct circ_buf *xmit = &port->info->xmit;
9999

100-
while (!(ioread8(port->membase + TIMBUART_ISR) & TXBF) &&
100+
while (!(ioread32(port->membase + TIMBUART_ISR) & TXBF) &&
101101
!uart_circ_empty(xmit)) {
102102
iowrite8(xmit->buf[xmit->tail],
103103
port->membase + TIMBUART_TXFIFO);
@@ -114,7 +114,7 @@ static void timbuart_tx_chars(struct uart_port *port)
114114
ioread8(port->membase + TIMBUART_BAUDRATE));
115115
}
116116

117-
static void timbuart_handle_tx_port(struct uart_port *port, u8 isr, u8 *ier)
117+
static void timbuart_handle_tx_port(struct uart_port *port, u32 isr, u32 *ier)
118118
{
119119
struct timbuart_port *uart =
120120
container_of(port, struct timbuart_port, port);
@@ -129,7 +129,7 @@ static void timbuart_handle_tx_port(struct uart_port *port, u8 isr, u8 *ier)
129129
if (isr & TXFLAGS) {
130130
timbuart_tx_chars(port);
131131
/* clear all TX interrupts */
132-
iowrite8(TXFLAGS, port->membase + TIMBUART_ISR);
132+
iowrite32(TXFLAGS, port->membase + TIMBUART_ISR);
133133

134134
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
135135
uart_write_wakeup(port);
@@ -148,7 +148,7 @@ static void timbuart_handle_tx_port(struct uart_port *port, u8 isr, u8 *ier)
148148
dev_dbg(port->dev, "%s - leaving\n", __func__);
149149
}
150150

151-
void timbuart_handle_rx_port(struct uart_port *port, u8 isr, u8 *ier)
151+
void timbuart_handle_rx_port(struct uart_port *port, u32 isr, u32 *ier)
152152
{
153153
if (isr & RXFLAGS) {
154154
/* Some RX status is set */
@@ -161,7 +161,7 @@ void timbuart_handle_rx_port(struct uart_port *port, u8 isr, u8 *ier)
161161
timbuart_rx_chars(port);
162162

163163
/* ack all RX interrupts */
164-
iowrite8(RXFLAGS, port->membase + TIMBUART_ISR);
164+
iowrite32(RXFLAGS, port->membase + TIMBUART_ISR);
165165
}
166166

167167
/* always have the RX interrupts enabled */
@@ -173,11 +173,11 @@ void timbuart_handle_rx_port(struct uart_port *port, u8 isr, u8 *ier)
173173
void timbuart_tasklet(unsigned long arg)
174174
{
175175
struct timbuart_port *uart = (struct timbuart_port *)arg;
176-
u8 isr, ier = 0;
176+
u32 isr, ier = 0;
177177

178178
spin_lock(&uart->port.lock);
179179

180-
isr = ioread8(uart->port.membase + TIMBUART_ISR);
180+
isr = ioread32(uart->port.membase + TIMBUART_ISR);
181181
dev_dbg(uart->port.dev, "%s ISR: %x\n", __func__, isr);
182182

183183
if (!uart->usedma)
@@ -188,17 +188,17 @@ void timbuart_tasklet(unsigned long arg)
188188
if (!uart->usedma)
189189
timbuart_handle_rx_port(&uart->port, isr, &ier);
190190

191-
iowrite8(ier, uart->port.membase + TIMBUART_IER);
191+
iowrite32(ier, uart->port.membase + TIMBUART_IER);
192192

193193
spin_unlock(&uart->port.lock);
194194
dev_dbg(uart->port.dev, "%s leaving\n", __func__);
195195
}
196196

197197
static unsigned int timbuart_tx_empty(struct uart_port *port)
198198
{
199-
u8 isr = ioread8(port->membase + TIMBUART_ISR);
199+
u32 isr = ioread32(port->membase + TIMBUART_ISR);
200200

201-
return (isr & TXBAE) ? TIOCSER_TEMT : 0;
201+
return (isr & TXBE) ? TIOCSER_TEMT : 0;
202202
}
203203

204204
static unsigned int timbuart_get_mctrl(struct uart_port *port)
@@ -222,13 +222,13 @@ static void timbuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
222222
iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL);
223223
}
224224

225-
static void timbuart_mctrl_check(struct uart_port *port, u8 isr, u8 *ier)
225+
static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier)
226226
{
227227
unsigned int cts;
228228

229229
if (isr & CTS_DELTA) {
230230
/* ack */
231-
iowrite8(CTS_DELTA, port->membase + TIMBUART_ISR);
231+
iowrite32(CTS_DELTA, port->membase + TIMBUART_ISR);
232232
cts = timbuart_get_mctrl(port);
233233
uart_handle_cts_change(port, cts & TIOCM_CTS);
234234
wake_up_interruptible(&port->info->delta_msr_wait);
@@ -255,9 +255,9 @@ static int timbuart_startup(struct uart_port *port)
255255
dev_dbg(port->dev, "%s\n", __func__);
256256

257257
iowrite8(TIMBUART_CTRL_FLSHRX, port->membase + TIMBUART_CTRL);
258-
iowrite8(0xff, port->membase + TIMBUART_ISR);
258+
iowrite32(0x1ff, port->membase + TIMBUART_ISR);
259259
/* Enable all but TX interrupts */
260-
iowrite8(RXBAF | RXBF | RXTT | CTS_DELTA,
260+
iowrite32(RXBAF | RXBF | RXTT | CTS_DELTA,
261261
port->membase + TIMBUART_IER);
262262

263263
return request_irq(port->irq, timbuart_handleinterrupt, IRQF_SHARED,
@@ -270,7 +270,7 @@ static void timbuart_shutdown(struct uart_port *port)
270270
container_of(port, struct timbuart_port, port);
271271
dev_dbg(port->dev, "%s\n", __func__);
272272
free_irq(port->irq, uart);
273-
iowrite8(0, port->membase + TIMBUART_IER);
273+
iowrite32(0, port->membase + TIMBUART_IER);
274274
}
275275

276276
static int get_bindex(int baud)
@@ -359,10 +359,10 @@ static irqreturn_t timbuart_handleinterrupt(int irq, void *devid)
359359
struct timbuart_port *uart = (struct timbuart_port *)devid;
360360

361361
if (ioread8(uart->port.membase + TIMBUART_IPR)) {
362-
uart->last_ier = ioread8(uart->port.membase + TIMBUART_IER);
362+
uart->last_ier = ioread32(uart->port.membase + TIMBUART_IER);
363363

364364
/* disable interrupts, the tasklet enables them again */
365-
iowrite8(0, uart->port.membase + TIMBUART_IER);
365+
iowrite32(0, uart->port.membase + TIMBUART_IER);
366366

367367
/* fire off bottom half */
368368
tasklet_schedule(&uart->tasklet);

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