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dt-bindings: net: Convert fsl-fman to yaml
Convert fsl-fman from txt to yaml format and split it fsl,fman.yam, fsl,fman-port.yaml, fsl-muram.yaml, fsl-mdio.yaml. Addition changes: fsl,fman.yaml: - Fixed interrupts in example. - Fixed ethernet@e8000 miss } in example. - ptp-timer add label in example. - Ref to new fsl,fman*.yaml. - Reorder property in example. - Keep only one example. - Add const for #address-cells and #size-cells. - Use defined interrupt type. - ptp example use node name phc. fsl,fman-port: - Keep only one example. fsl,fman-mdio: - Add little-endian property. - Add ref to mdio.yaml. - Remove suppress-preamble. - Add #address-cells and #size-cells in example. - Remove clock-frequency, which already describe in mmio.yaml. fsl,muram.yaml: - Add reg property. - Remove range property. - Use reg instead of range in example. Signed-off-by: Frank Li <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
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‎Documentation/devicetree/bindings/net/fsl,fman-mdio.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/fsl,fman-mdio.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale Frame Manager MDIO Device
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maintainers:
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- Frank Li <[email protected]>
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description: FMan MDIO Node.
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The MDIO is a bus to which the PHY devices are connected.
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properties:
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compatible:
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enum:
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- fsl,fman-mdio
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- fsl,fman-xmdio
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- fsl,fman-memac-mdio
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description:
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Must include "fsl,fman-mdio" for 1 Gb/s MDIO from FMan v2.
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Must include "fsl,fman-xmdio" for 10 Gb/s MDIO from FMan v2.
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Must include "fsl,fman-memac-mdio" for 1/10 Gb/s MDIO from
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FMan v3.
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reg:
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maxItems: 1
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clocks:
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items:
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- description: A reference to the input clock of the controller
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from which the MDC frequency is derived.
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interrupts:
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maxItems: 1
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fsl,fman-internal-mdio:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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Fman has internal MDIO for internal PCS(Physical
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Coding Sublayer) PHYs and external MDIO for external PHYs.
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The settings and programming routines for internal/external
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MDIO are different. Must be included for internal MDIO.
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fsl,erratum-a009885:
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$ref: /schemas/types.yaml#/definitions/flag
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description: Indicates the presence of the A009885
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erratum describing that the contents of MDIO_DATA may
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become corrupt unless it is read within 16 MDC cycles
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of MDIO_CFG[BSY] being cleared, when performing an
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MDIO read operation.
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fsl,erratum-a011043:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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Indicates the presence of the A011043 erratum
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describing that the MDIO_CFG[MDIO_RD_ER] bit may be falsely
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set when reading internal PCS registers. MDIO reads to
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internal PCS registers may result in having the
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MDIO_CFG[MDIO_RD_ER] bit set, even when there is no error and
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read data (MDIO_DATA[MDIO_DATA]) is correct.
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Software may get false read error when reading internal
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PCS registers through MDIO. As a workaround, all internal
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MDIO accesses should ignore the MDIO_CFG[MDIO_RD_ER] bit.
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For internal PHY device on internal mdio bus, a PHY node should be created.
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See the definition of the PHY node in booting-without-of.txt for an
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example of how to define a PHY (Internal PHY has no interrupt line).
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- For "fsl,fman-mdio" compatible internal mdio bus, the PHY is TBI PHY.
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- For "fsl,fman-memac-mdio" compatible internal mdio bus, the PHY is PCS PHY.
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The PCS PHY address should correspond to the value of the appropriate
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MDEV_PORT.
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little-endian:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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IP block is little-endian mode. The default endian mode is big-endian.
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required:
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- compatible
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- reg
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allOf:
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- $ref: mdio.yaml#
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unevaluatedProperties: false
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examples:
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- |
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mdio@f1000 {
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compatible = "fsl,fman-xmdio";
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reg = <0xf1000 0x1000>;
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interrupts = <101 2 0 0>;
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};
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- |
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mdio@e3120 {
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compatible = "fsl,fman-mdio";
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reg = <0xe3120 0xee0>;
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fsl,fman-internal-mdio;
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#address-cells = <1>;
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#size-cells = <0>;
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tbi-phy@8 {
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reg = <0x8>;
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device_type = "tbi-phy";
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};
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};
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- |
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mdio@f1000 {
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compatible = "fsl,fman-memac-mdio";
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reg = <0xf1000 0x1000>;
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fsl,fman-internal-mdio;
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#address-cells = <1>;
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#size-cells = <0>;
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pcsphy6: ethernet-phy@0 {
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reg = <0x0>;
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};
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};
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‎Documentation/devicetree/bindings/net/fsl,fman-muram.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/fsl,fman-muram.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale Frame Manager MURAM Device
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maintainers:
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- Frank Li <[email protected]>
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description: |
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FMan Internal memory - shared between all the FMan modules.
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It contains data structures that are common and written to or read by
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the modules.
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FMan internal memory is split into the following parts:
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Packet buffering (Tx/Rx FIFOs)
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Frames internal context
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properties:
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compatible:
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enum:
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- fsl,fman-muram
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reg:
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maxItems: 1
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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muram@0 {
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compatible = "fsl,fman-muram";
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reg = <0x0 0x28000>;
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};

‎Documentation/devicetree/bindings/net/fsl,fman-port.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/fsl,fman-port.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale Frame Manager Port Device
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maintainers:
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- Frank Li <[email protected]>
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description: |
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The Frame Manager (FMan) supports several types of hardware ports:
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Ethernet receiver (RX)
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Ethernet transmitter (TX)
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Offline/Host command (O/H)
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properties:
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compatible:
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enum:
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- fsl,fman-v2-port-oh
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- fsl,fman-v2-port-rx
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- fsl,fman-v2-port-tx
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- fsl,fman-v3-port-oh
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- fsl,fman-v3-port-rx
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- fsl,fman-v3-port-tx
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cell-index:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Specifies the hardware port id.
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Each hardware port on the FMan has its own hardware PortID.
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Super set of all hardware Port IDs available at FMan Reference
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Manual under "FMan Hardware Ports in Freescale Devices" table.
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Each hardware port is assigned a 4KB, port-specific page in
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the FMan hardware port memory region (which is part of the
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FMan memory map). The first 4 KB in the FMan hardware ports
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memory region is used for what are called common registers.
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The subsequent 63 4KB pages are allocated to the hardware
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ports.
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The page of a specific port is determined by the cell-index.
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reg:
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items:
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- description: There is one reg region describing the port
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configuration registers.
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fsl,fman-10g-port:
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$ref: /schemas/types.yaml#/definitions/flag
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description: The default port rate is 1G.
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If this property exists, the port is s 10G port.
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fsl,fman-best-effort-port:
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$ref: /schemas/types.yaml#/definitions/flag
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description: The default port rate is 1G.
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Can be defined only if 10G-support is set.
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This property marks a best-effort 10G port (10G port that
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may not be capable of line rate).
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required:
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- compatible
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- reg
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- cell-index
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additionalProperties: false
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examples:
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- |
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port@a8000 {
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compatible = "fsl,fman-v2-port-tx";
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reg = <0xa8000 0x1000>;
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cell-index = <0x28>;
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};
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