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| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | +# Copyright 2019 Analog Devices Inc. |
| 3 | +%YAML 1.2 |
| 4 | +--- |
| 5 | +$id: http://devicetree.org/schemas/bindings/iio/adc/adi,ad7124.yaml# |
| 6 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 7 | + |
| 8 | +title: Analog Devices AD7124 ADC device driver |
| 9 | + |
| 10 | +maintainers: |
| 11 | + |
| 12 | + |
| 13 | +description: | |
| 14 | + Bindings for the Analog Devices AD7124 ADC device. Datasheet can be |
| 15 | + found here: |
| 16 | + https://www.analog.com/media/en/technical-documentation/data-sheets/AD7124-8.pdf |
| 17 | +
|
| 18 | +properties: |
| 19 | + compatible: |
| 20 | + enum: |
| 21 | + - adi,ad7124-4 |
| 22 | + - adi,ad7124-8 |
| 23 | + |
| 24 | + reg: |
| 25 | + description: SPI chip select number for the device |
| 26 | + maxItems: 1 |
| 27 | + |
| 28 | + clocks: |
| 29 | + maxItems: 1 |
| 30 | + description: phandle to the master clock (mclk) |
| 31 | + |
| 32 | + clock-names: |
| 33 | + items: |
| 34 | + - const: mclk |
| 35 | + |
| 36 | + interrupts: |
| 37 | + description: IRQ line for the ADC |
| 38 | + maxItems: 1 |
| 39 | + |
| 40 | + '#address-cells': |
| 41 | + const: 1 |
| 42 | + |
| 43 | + '#size-cells': |
| 44 | + const: 0 |
| 45 | + |
| 46 | + refin1-supply: |
| 47 | + description: refin1 supply can be used as reference for conversion. |
| 48 | + maxItems: 1 |
| 49 | + |
| 50 | + refin2-supply: |
| 51 | + description: refin2 supply can be used as reference for conversion. |
| 52 | + maxItems: 1 |
| 53 | + |
| 54 | + avdd-supply: |
| 55 | + description: avdd supply can be used as reference for conversion. |
| 56 | + maxItems: 1 |
| 57 | + |
| 58 | +required: |
| 59 | + - compatible |
| 60 | + - reg |
| 61 | + - clocks |
| 62 | + - clock-names |
| 63 | + - interrupts |
| 64 | + |
| 65 | +patternProperties: |
| 66 | + "^channel@([0-9]|1[0-5])$": |
| 67 | + type: object |
| 68 | + description: | |
| 69 | + Represents the external channels which are connected to the ADC. |
| 70 | + See Documentation/devicetree/bindings/iio/adc/adc.txt. |
| 71 | +
|
| 72 | + properties: |
| 73 | + reg: |
| 74 | + description: | |
| 75 | + The channel number. It can have up to 8 channels on ad7124-4 |
| 76 | + and 16 channels on ad7124-8, numbered from 0 to 15. |
| 77 | + items: |
| 78 | + minimum: 0 |
| 79 | + maximum: 15 |
| 80 | + |
| 81 | + adi,reference-select: |
| 82 | + description: | |
| 83 | + Select the reference source to use when converting on |
| 84 | + the specific channel. Valid values are: |
| 85 | + 0: REFIN1(+)/REFIN1(−). |
| 86 | + 1: REFIN2(+)/REFIN2(−). |
| 87 | + 3: AVDD |
| 88 | + If this field is left empty, internal reference is selected. |
| 89 | + allOf: |
| 90 | + - $ref: /schemas/types.yaml#/definitions/uint32 |
| 91 | + - enum: [0, 1, 3] |
| 92 | + |
| 93 | + diff-channels: |
| 94 | + description: see Documentation/devicetree/bindings/iio/adc/adc.txt |
| 95 | + items: |
| 96 | + minimum: 0 |
| 97 | + maximum: 15 |
| 98 | + |
| 99 | + bipolar: |
| 100 | + description: see Documentation/devicetree/bindings/iio/adc/adc.txt |
| 101 | + type: boolean |
| 102 | + |
| 103 | + required: |
| 104 | + - reg |
| 105 | + - diff-channels |
| 106 | + |
| 107 | +examples: |
| 108 | + - | |
| 109 | + adc@0 { |
| 110 | + compatible = "adi,ad7124-4"; |
| 111 | + reg = <0>; |
| 112 | + spi-max-frequency = <5000000>; |
| 113 | + interrupts = <25 2>; |
| 114 | + interrupt-parent = <&gpio>; |
| 115 | + refin1-supply = <&adc_vref>; |
| 116 | + clocks = <&ad7124_mclk>; |
| 117 | + clock-names = "mclk"; |
| 118 | +
|
| 119 | + #address-cells = <1>; |
| 120 | + #size-cells = <0>; |
| 121 | +
|
| 122 | + channel@0 { |
| 123 | + reg = <0>; |
| 124 | + diff-channels = <0 1>; |
| 125 | + adi,reference-select = <0>; |
| 126 | + }; |
| 127 | +
|
| 128 | + channel@1 { |
| 129 | + reg = <1>; |
| 130 | + bipolar; |
| 131 | + diff-channels = <2 3>; |
| 132 | + adi,reference-select = <0>; |
| 133 | + }; |
| 134 | +
|
| 135 | + channel@2 { |
| 136 | + reg = <2>; |
| 137 | + diff-channels = <4 5>; |
| 138 | + }; |
| 139 | +
|
| 140 | + channel@3 { |
| 141 | + reg = <3>; |
| 142 | + diff-channels = <6 7>; |
| 143 | + }; |
| 144 | + }; |
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