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chelsiocudbgdavem330
chelsiocudbg
authored and
davem330
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cxgb4: collect hardware LA dumps
Collect CIM, CIM_MA, ULP_RX, TP, CIM_PIF, and ULP_TX logic analyzer dumps. Signed-off-by: Rahul Lakkireddy <[email protected]> Signed-off-by: Ganesh Goudar <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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-0
lines changed

6 files changed

+250
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lines changed

‎drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -45,6 +45,32 @@ struct ireg_buf {
4545
u32 outbuf[32];
4646
};
4747

48+
struct cudbg_ulprx_la {
49+
u32 data[ULPRX_LA_SIZE * 8];
50+
u32 size;
51+
};
52+
53+
struct cudbg_tp_la {
54+
u32 size;
55+
u32 mode;
56+
u8 data[0];
57+
};
58+
59+
struct cudbg_cim_pif_la {
60+
int size;
61+
u8 data[0];
62+
};
63+
64+
#define CUDBG_NUM_ULPTX 11
65+
#define CUDBG_NUM_ULPTX_READ 512
66+
67+
struct cudbg_ulptx_la {
68+
u32 rdptr[CUDBG_NUM_ULPTX];
69+
u32 wrptr[CUDBG_NUM_ULPTX];
70+
u32 rddata[CUDBG_NUM_ULPTX];
71+
u32 rd_data[CUDBG_NUM_ULPTX][CUDBG_NUM_ULPTX_READ];
72+
};
73+
4874
#define IREG_NUM_ELEM 4
4975

5076
static const u32 t6_tp_pio_array[][IREG_NUM_ELEM] = {

‎drivers/net/ethernet/chelsio/cxgb4/cudbg_if.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,8 @@
2929
enum cudbg_dbg_entity_type {
3030
CUDBG_REG_DUMP = 1,
3131
CUDBG_DEV_LOG = 2,
32+
CUDBG_CIM_LA = 3,
33+
CUDBG_CIM_MA_LA = 4,
3234
CUDBG_CIM_IBQ_TP0 = 6,
3335
CUDBG_CIM_IBQ_TP1 = 7,
3436
CUDBG_CIM_IBQ_ULP = 8,
@@ -45,11 +47,15 @@ enum cudbg_dbg_entity_type {
4547
CUDBG_EDC1 = 19,
4648
CUDBG_TP_INDIRECT = 36,
4749
CUDBG_SGE_INDIRECT = 37,
50+
CUDBG_ULPRX_LA = 41,
51+
CUDBG_TP_LA = 43,
52+
CUDBG_CIM_PIF_LA = 45,
4853
CUDBG_CIM_OBQ_RXQ0 = 47,
4954
CUDBG_CIM_OBQ_RXQ1 = 48,
5055
CUDBG_PCIE_INDIRECT = 50,
5156
CUDBG_PM_INDIRECT = 51,
5257
CUDBG_MA_INDIRECT = 61,
58+
CUDBG_ULPTX_LA = 62,
5359
CUDBG_UP_CIM_INDIRECT = 64,
5460
CUDBG_MBOX_LOG = 66,
5561
CUDBG_HMA_INDIRECT = 67,

‎drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c

Lines changed: 164 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -129,6 +129,69 @@ int cudbg_collect_fw_devlog(struct cudbg_init *pdbg_init,
129129
return rc;
130130
}
131131

132+
int cudbg_collect_cim_la(struct cudbg_init *pdbg_init,
133+
struct cudbg_buffer *dbg_buff,
134+
struct cudbg_error *cudbg_err)
135+
{
136+
struct adapter *padap = pdbg_init->adap;
137+
struct cudbg_buffer temp_buff = { 0 };
138+
int size, rc;
139+
u32 cfg = 0;
140+
141+
if (is_t6(padap->params.chip)) {
142+
size = padap->params.cim_la_size / 10 + 1;
143+
size *= 11 * sizeof(u32);
144+
} else {
145+
size = padap->params.cim_la_size / 8;
146+
size *= 8 * sizeof(u32);
147+
}
148+
149+
size += sizeof(cfg);
150+
rc = cudbg_get_buff(dbg_buff, size, &temp_buff);
151+
if (rc)
152+
return rc;
153+
154+
rc = t4_cim_read(padap, UP_UP_DBG_LA_CFG_A, 1, &cfg);
155+
if (rc) {
156+
cudbg_err->sys_err = rc;
157+
cudbg_put_buff(&temp_buff, dbg_buff);
158+
return rc;
159+
}
160+
161+
memcpy((char *)temp_buff.data, &cfg, sizeof(cfg));
162+
rc = t4_cim_read_la(padap,
163+
(u32 *)((char *)temp_buff.data + sizeof(cfg)),
164+
NULL);
165+
if (rc < 0) {
166+
cudbg_err->sys_err = rc;
167+
cudbg_put_buff(&temp_buff, dbg_buff);
168+
return rc;
169+
}
170+
cudbg_write_and_release_buff(&temp_buff, dbg_buff);
171+
return rc;
172+
}
173+
174+
int cudbg_collect_cim_ma_la(struct cudbg_init *pdbg_init,
175+
struct cudbg_buffer *dbg_buff,
176+
struct cudbg_error *cudbg_err)
177+
{
178+
struct adapter *padap = pdbg_init->adap;
179+
struct cudbg_buffer temp_buff = { 0 };
180+
int size, rc;
181+
182+
size = 2 * CIM_MALA_SIZE * 5 * sizeof(u32);
183+
rc = cudbg_get_buff(dbg_buff, size, &temp_buff);
184+
if (rc)
185+
return rc;
186+
187+
t4_cim_read_ma_la(padap,
188+
(u32 *)temp_buff.data,
189+
(u32 *)((char *)temp_buff.data +
190+
5 * CIM_MALA_SIZE));
191+
cudbg_write_and_release_buff(&temp_buff, dbg_buff);
192+
return rc;
193+
}
194+
132195
static int cudbg_read_cim_ibq(struct cudbg_init *pdbg_init,
133196
struct cudbg_buffer *dbg_buff,
134197
struct cudbg_error *cudbg_err, int qid)
@@ -574,6 +637,72 @@ int cudbg_collect_sge_indirect(struct cudbg_init *pdbg_init,
574637
return rc;
575638
}
576639

640+
int cudbg_collect_ulprx_la(struct cudbg_init *pdbg_init,
641+
struct cudbg_buffer *dbg_buff,
642+
struct cudbg_error *cudbg_err)
643+
{
644+
struct adapter *padap = pdbg_init->adap;
645+
struct cudbg_buffer temp_buff = { 0 };
646+
struct cudbg_ulprx_la *ulprx_la_buff;
647+
int rc;
648+
649+
rc = cudbg_get_buff(dbg_buff, sizeof(struct cudbg_ulprx_la),
650+
&temp_buff);
651+
if (rc)
652+
return rc;
653+
654+
ulprx_la_buff = (struct cudbg_ulprx_la *)temp_buff.data;
655+
t4_ulprx_read_la(padap, (u32 *)ulprx_la_buff->data);
656+
ulprx_la_buff->size = ULPRX_LA_SIZE;
657+
cudbg_write_and_release_buff(&temp_buff, dbg_buff);
658+
return rc;
659+
}
660+
661+
int cudbg_collect_tp_la(struct cudbg_init *pdbg_init,
662+
struct cudbg_buffer *dbg_buff,
663+
struct cudbg_error *cudbg_err)
664+
{
665+
struct adapter *padap = pdbg_init->adap;
666+
struct cudbg_buffer temp_buff = { 0 };
667+
struct cudbg_tp_la *tp_la_buff;
668+
int size, rc;
669+
670+
size = sizeof(struct cudbg_tp_la) + TPLA_SIZE * sizeof(u64);
671+
rc = cudbg_get_buff(dbg_buff, size, &temp_buff);
672+
if (rc)
673+
return rc;
674+
675+
tp_la_buff = (struct cudbg_tp_la *)temp_buff.data;
676+
tp_la_buff->mode = DBGLAMODE_G(t4_read_reg(padap, TP_DBG_LA_CONFIG_A));
677+
t4_tp_read_la(padap, (u64 *)tp_la_buff->data, NULL);
678+
cudbg_write_and_release_buff(&temp_buff, dbg_buff);
679+
return rc;
680+
}
681+
682+
int cudbg_collect_cim_pif_la(struct cudbg_init *pdbg_init,
683+
struct cudbg_buffer *dbg_buff,
684+
struct cudbg_error *cudbg_err)
685+
{
686+
struct cudbg_cim_pif_la *cim_pif_la_buff;
687+
struct adapter *padap = pdbg_init->adap;
688+
struct cudbg_buffer temp_buff = { 0 };
689+
int size, rc;
690+
691+
size = sizeof(struct cudbg_cim_pif_la) +
692+
2 * CIM_PIFLA_SIZE * 6 * sizeof(u32);
693+
rc = cudbg_get_buff(dbg_buff, size, &temp_buff);
694+
if (rc)
695+
return rc;
696+
697+
cim_pif_la_buff = (struct cudbg_cim_pif_la *)temp_buff.data;
698+
cim_pif_la_buff->size = CIM_PIFLA_SIZE;
699+
t4_cim_read_pif_la(padap, (u32 *)cim_pif_la_buff->data,
700+
(u32 *)cim_pif_la_buff->data + 6 * CIM_PIFLA_SIZE,
701+
NULL, NULL);
702+
cudbg_write_and_release_buff(&temp_buff, dbg_buff);
703+
return rc;
704+
}
705+
577706
int cudbg_collect_pcie_indirect(struct cudbg_init *pdbg_init,
578707
struct cudbg_buffer *dbg_buff,
579708
struct cudbg_error *cudbg_err)
@@ -743,6 +872,41 @@ int cudbg_collect_ma_indirect(struct cudbg_init *pdbg_init,
743872
return rc;
744873
}
745874

875+
int cudbg_collect_ulptx_la(struct cudbg_init *pdbg_init,
876+
struct cudbg_buffer *dbg_buff,
877+
struct cudbg_error *cudbg_err)
878+
{
879+
struct adapter *padap = pdbg_init->adap;
880+
struct cudbg_buffer temp_buff = { 0 };
881+
struct cudbg_ulptx_la *ulptx_la_buff;
882+
u32 i, j;
883+
int rc;
884+
885+
rc = cudbg_get_buff(dbg_buff, sizeof(struct cudbg_ulptx_la),
886+
&temp_buff);
887+
if (rc)
888+
return rc;
889+
890+
ulptx_la_buff = (struct cudbg_ulptx_la *)temp_buff.data;
891+
for (i = 0; i < CUDBG_NUM_ULPTX; i++) {
892+
ulptx_la_buff->rdptr[i] = t4_read_reg(padap,
893+
ULP_TX_LA_RDPTR_0_A +
894+
0x10 * i);
895+
ulptx_la_buff->wrptr[i] = t4_read_reg(padap,
896+
ULP_TX_LA_WRPTR_0_A +
897+
0x10 * i);
898+
ulptx_la_buff->rddata[i] = t4_read_reg(padap,
899+
ULP_TX_LA_RDDATA_0_A +
900+
0x10 * i);
901+
for (j = 0; j < CUDBG_NUM_ULPTX_READ; j++)
902+
ulptx_la_buff->rd_data[i][j] =
903+
t4_read_reg(padap,
904+
ULP_TX_LA_RDDATA_0_A + 0x10 * i);
905+
}
906+
cudbg_write_and_release_buff(&temp_buff, dbg_buff);
907+
return rc;
908+
}
909+
746910
int cudbg_collect_up_cim_indirect(struct cudbg_init *pdbg_init,
747911
struct cudbg_buffer *dbg_buff,
748912
struct cudbg_error *cudbg_err)

‎drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.h

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,12 @@ int cudbg_collect_reg_dump(struct cudbg_init *pdbg_init,
2424
int cudbg_collect_fw_devlog(struct cudbg_init *pdbg_init,
2525
struct cudbg_buffer *dbg_buff,
2626
struct cudbg_error *cudbg_err);
27+
int cudbg_collect_cim_la(struct cudbg_init *pdbg_init,
28+
struct cudbg_buffer *dbg_buff,
29+
struct cudbg_error *cudbg_err);
30+
int cudbg_collect_cim_ma_la(struct cudbg_init *pdbg_init,
31+
struct cudbg_buffer *dbg_buff,
32+
struct cudbg_error *cudbg_err);
2733
int cudbg_collect_cim_ibq_tp0(struct cudbg_init *pdbg_init,
2834
struct cudbg_buffer *dbg_buff,
2935
struct cudbg_error *cudbg_err);
@@ -72,6 +78,15 @@ int cudbg_collect_tp_indirect(struct cudbg_init *pdbg_init,
7278
int cudbg_collect_sge_indirect(struct cudbg_init *pdbg_init,
7379
struct cudbg_buffer *dbg_buff,
7480
struct cudbg_error *cudbg_err);
81+
int cudbg_collect_ulprx_la(struct cudbg_init *pdbg_init,
82+
struct cudbg_buffer *dbg_buff,
83+
struct cudbg_error *cudbg_err);
84+
int cudbg_collect_tp_la(struct cudbg_init *pdbg_init,
85+
struct cudbg_buffer *dbg_buff,
86+
struct cudbg_error *cudbg_err);
87+
int cudbg_collect_cim_pif_la(struct cudbg_init *pdbg_init,
88+
struct cudbg_buffer *dbg_buff,
89+
struct cudbg_error *cudbg_err);
7590
int cudbg_collect_obq_sge_rx_q0(struct cudbg_init *pdbg_init,
7691
struct cudbg_buffer *dbg_buff,
7792
struct cudbg_error *cudbg_err);
@@ -87,6 +102,9 @@ int cudbg_collect_pm_indirect(struct cudbg_init *pdbg_init,
87102
int cudbg_collect_ma_indirect(struct cudbg_init *pdbg_init,
88103
struct cudbg_buffer *dbg_buff,
89104
struct cudbg_error *cudbg_err);
105+
int cudbg_collect_ulptx_la(struct cudbg_init *pdbg_init,
106+
struct cudbg_buffer *dbg_buff,
107+
struct cudbg_error *cudbg_err);
90108
int cudbg_collect_up_cim_indirect(struct cudbg_init *pdbg_init,
91109
struct cudbg_buffer *dbg_buff,
92110
struct cudbg_error *cudbg_err);

‎drivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c

Lines changed: 32 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,8 @@ static const struct cxgb4_collect_entity cxgb4_collect_hw_dump[] = {
2929
{ CUDBG_MBOX_LOG, cudbg_collect_mbox_log },
3030
{ CUDBG_DEV_LOG, cudbg_collect_fw_devlog },
3131
{ CUDBG_REG_DUMP, cudbg_collect_reg_dump },
32+
{ CUDBG_CIM_LA, cudbg_collect_cim_la },
33+
{ CUDBG_CIM_MA_LA, cudbg_collect_cim_ma_la },
3234
{ CUDBG_CIM_IBQ_TP0, cudbg_collect_cim_ibq_tp0 },
3335
{ CUDBG_CIM_IBQ_TP1, cudbg_collect_cim_ibq_tp1 },
3436
{ CUDBG_CIM_IBQ_ULP, cudbg_collect_cim_ibq_ulp },
@@ -43,11 +45,15 @@ static const struct cxgb4_collect_entity cxgb4_collect_hw_dump[] = {
4345
{ CUDBG_CIM_OBQ_NCSI, cudbg_collect_cim_obq_ncsi },
4446
{ CUDBG_TP_INDIRECT, cudbg_collect_tp_indirect },
4547
{ CUDBG_SGE_INDIRECT, cudbg_collect_sge_indirect },
48+
{ CUDBG_ULPRX_LA, cudbg_collect_ulprx_la },
49+
{ CUDBG_TP_LA, cudbg_collect_tp_la },
50+
{ CUDBG_CIM_PIF_LA, cudbg_collect_cim_pif_la },
4651
{ CUDBG_CIM_OBQ_RXQ0, cudbg_collect_obq_sge_rx_q0 },
4752
{ CUDBG_CIM_OBQ_RXQ1, cudbg_collect_obq_sge_rx_q1 },
4853
{ CUDBG_PCIE_INDIRECT, cudbg_collect_pcie_indirect },
4954
{ CUDBG_PM_INDIRECT, cudbg_collect_pm_indirect },
5055
{ CUDBG_MA_INDIRECT, cudbg_collect_ma_indirect },
56+
{ CUDBG_ULPTX_LA, cudbg_collect_ulptx_la },
5157
{ CUDBG_UP_CIM_INDIRECT, cudbg_collect_up_cim_indirect },
5258
{ CUDBG_HMA_INDIRECT, cudbg_collect_hma_indirect },
5359
};
@@ -73,6 +79,19 @@ static u32 cxgb4_get_entity_length(struct adapter *adap, u32 entity)
7379
case CUDBG_DEV_LOG:
7480
len = adap->params.devlog.size;
7581
break;
82+
case CUDBG_CIM_LA:
83+
if (is_t6(adap->params.chip)) {
84+
len = adap->params.cim_la_size / 10 + 1;
85+
len *= 11 * sizeof(u32);
86+
} else {
87+
len = adap->params.cim_la_size / 8;
88+
len *= 8 * sizeof(u32);
89+
}
90+
len += sizeof(u32); /* for reading CIM LA configuration */
91+
break;
92+
case CUDBG_CIM_MA_LA:
93+
len = 2 * CIM_MALA_SIZE * 5 * sizeof(u32);
94+
break;
7695
case CUDBG_CIM_IBQ_TP0:
7796
case CUDBG_CIM_IBQ_TP1:
7897
case CUDBG_CIM_IBQ_ULP:
@@ -142,6 +161,16 @@ static u32 cxgb4_get_entity_length(struct adapter *adap, u32 entity)
142161
case CUDBG_SGE_INDIRECT:
143162
len = sizeof(struct ireg_buf) * 2;
144163
break;
164+
case CUDBG_ULPRX_LA:
165+
len = sizeof(struct cudbg_ulprx_la);
166+
break;
167+
case CUDBG_TP_LA:
168+
len = sizeof(struct cudbg_tp_la) + TPLA_SIZE * sizeof(u64);
169+
break;
170+
case CUDBG_CIM_PIF_LA:
171+
len = sizeof(struct cudbg_cim_pif_la);
172+
len += 2 * CIM_PIFLA_SIZE * 6 * sizeof(u32);
173+
break;
145174
case CUDBG_PCIE_INDIRECT:
146175
n = sizeof(t5_pcie_pdbg_array) / (IREG_NUM_ELEM * sizeof(u32));
147176
len = sizeof(struct ireg_buf) * n * 2;
@@ -157,6 +186,9 @@ static u32 cxgb4_get_entity_length(struct adapter *adap, u32 entity)
157186
len = sizeof(struct ireg_buf) * n * 2;
158187
}
159188
break;
189+
case CUDBG_ULPTX_LA:
190+
len = sizeof(struct cudbg_ulptx_la);
191+
break;
160192
case CUDBG_UP_CIM_INDIRECT:
161193
n = sizeof(t5_up_cim_reg_array) / (IREG_NUM_ELEM * sizeof(u32));
162194
len = sizeof(struct ireg_buf) * n;

‎drivers/net/ethernet/chelsio/cxgb4/t4_regs.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1629,6 +1629,10 @@
16291629
#define IESPI_PAR_ERROR_V(x) ((x) << IESPI_PAR_ERROR_S)
16301630
#define IESPI_PAR_ERROR_F IESPI_PAR_ERROR_V(1U)
16311631

1632+
#define ULP_TX_LA_RDPTR_0_A 0x8ec0
1633+
#define ULP_TX_LA_RDDATA_0_A 0x8ec4
1634+
#define ULP_TX_LA_WRPTR_0_A 0x8ec8
1635+
16321636
#define PMRX_E_PCMD_PAR_ERROR_S 0
16331637
#define PMRX_E_PCMD_PAR_ERROR_V(x) ((x) << PMRX_E_PCMD_PAR_ERROR_S)
16341638
#define PMRX_E_PCMD_PAR_ERROR_F PMRX_E_PCMD_PAR_ERROR_V(1U)

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