|
| 1 | +/* |
| 2 | + * TX4938 internal IDE driver |
| 3 | + * Based on tx4939ide.c. |
| 4 | + * |
| 5 | + * This file is subject to the terms and conditions of the GNU General Public |
| 6 | + * License. See the file "COPYING" in the main directory of this archive |
| 7 | + * for more details. |
| 8 | + * |
| 9 | + * (C) Copyright TOSHIBA CORPORATION 2005-2007 |
| 10 | + */ |
| 11 | + |
| 12 | +#include <linux/module.h> |
| 13 | +#include <linux/types.h> |
| 14 | +#include <linux/ide.h> |
| 15 | +#include <linux/init.h> |
| 16 | +#include <linux/platform_device.h> |
| 17 | +#include <linux/io.h> |
| 18 | +#include <asm/txx9/tx4938.h> |
| 19 | + |
| 20 | +static void tx4938ide_tune_ebusc(unsigned int ebus_ch, |
| 21 | + unsigned int gbus_clock, |
| 22 | + u8 pio) |
| 23 | +{ |
| 24 | + struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio); |
| 25 | + u64 cr = __raw_readq(&tx4938_ebuscptr->cr[ebus_ch]); |
| 26 | + unsigned int sp = (cr >> 4) & 3; |
| 27 | + unsigned int clock = gbus_clock / (4 - sp); |
| 28 | + unsigned int cycle = 1000000000 / clock; |
| 29 | + unsigned int wt, shwt; |
| 30 | + |
| 31 | + /* Minimum DIOx- active time */ |
| 32 | + wt = DIV_ROUND_UP(t->act8b, cycle) - 2; |
| 33 | + /* IORDY setup time: 35ns */ |
| 34 | + wt = max(wt, DIV_ROUND_UP(35, cycle)); |
| 35 | + /* actual wait-cycle is max(wt & ~1, 1) */ |
| 36 | + if (wt > 2 && (wt & 1)) |
| 37 | + wt++; |
| 38 | + wt &= ~1; |
| 39 | + /* Address-valid to DIOR/DIOW setup */ |
| 40 | + shwt = DIV_ROUND_UP(t->setup, cycle); |
| 41 | + |
| 42 | + pr_debug("tx4938ide: ebus %d, bus cycle %dns, WT %d, SHWT %d\n", |
| 43 | + ebus_ch, cycle, wt, shwt); |
| 44 | + |
| 45 | + __raw_writeq((cr & ~(0x3f007ull)) | (wt << 12) | shwt, |
| 46 | + &tx4938_ebuscptr->cr[ebus_ch]); |
| 47 | +} |
| 48 | + |
| 49 | +static void tx4938ide_set_pio_mode(ide_drive_t *drive, const u8 pio) |
| 50 | +{ |
| 51 | + ide_hwif_t *hwif = drive->hwif; |
| 52 | + struct tx4938ide_platform_info *pdata = hwif->dev->platform_data; |
| 53 | + u8 safe = pio; |
| 54 | + ide_drive_t *pair; |
| 55 | + |
| 56 | + pair = ide_get_pair_dev(drive); |
| 57 | + if (pair) |
| 58 | + safe = min(safe, ide_get_best_pio_mode(pair, 255, 5)); |
| 59 | + tx4938ide_tune_ebusc(pdata->ebus_ch, pdata->gbus_clock, safe); |
| 60 | +} |
| 61 | + |
| 62 | +#ifdef __BIG_ENDIAN |
| 63 | + |
| 64 | +/* custom iops (independent from SWAP_IO_SPACE) */ |
| 65 | +static u8 tx4938ide_inb(unsigned long port) |
| 66 | +{ |
| 67 | + return __raw_readb((void __iomem *)port); |
| 68 | +} |
| 69 | + |
| 70 | +static void tx4938ide_outb(u8 value, unsigned long port) |
| 71 | +{ |
| 72 | + __raw_writeb(value, (void __iomem *)port); |
| 73 | +} |
| 74 | + |
| 75 | +static void tx4938ide_tf_load(ide_drive_t *drive, ide_task_t *task) |
| 76 | +{ |
| 77 | + ide_hwif_t *hwif = drive->hwif; |
| 78 | + struct ide_io_ports *io_ports = &hwif->io_ports; |
| 79 | + struct ide_taskfile *tf = &task->tf; |
| 80 | + u8 HIHI = task->tf_flags & IDE_TFLAG_LBA48 ? 0xE0 : 0xEF; |
| 81 | + |
| 82 | + if (task->tf_flags & IDE_TFLAG_FLAGGED) |
| 83 | + HIHI = 0xFF; |
| 84 | + |
| 85 | + if (task->tf_flags & IDE_TFLAG_OUT_DATA) { |
| 86 | + u16 data = (tf->hob_data << 8) | tf->data; |
| 87 | + |
| 88 | + /* no endian swap */ |
| 89 | + __raw_writew(data, (void __iomem *)io_ports->data_addr); |
| 90 | + } |
| 91 | + |
| 92 | + if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE) |
| 93 | + tx4938ide_outb(tf->hob_feature, io_ports->feature_addr); |
| 94 | + if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT) |
| 95 | + tx4938ide_outb(tf->hob_nsect, io_ports->nsect_addr); |
| 96 | + if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL) |
| 97 | + tx4938ide_outb(tf->hob_lbal, io_ports->lbal_addr); |
| 98 | + if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM) |
| 99 | + tx4938ide_outb(tf->hob_lbam, io_ports->lbam_addr); |
| 100 | + if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH) |
| 101 | + tx4938ide_outb(tf->hob_lbah, io_ports->lbah_addr); |
| 102 | + |
| 103 | + if (task->tf_flags & IDE_TFLAG_OUT_FEATURE) |
| 104 | + tx4938ide_outb(tf->feature, io_ports->feature_addr); |
| 105 | + if (task->tf_flags & IDE_TFLAG_OUT_NSECT) |
| 106 | + tx4938ide_outb(tf->nsect, io_ports->nsect_addr); |
| 107 | + if (task->tf_flags & IDE_TFLAG_OUT_LBAL) |
| 108 | + tx4938ide_outb(tf->lbal, io_ports->lbal_addr); |
| 109 | + if (task->tf_flags & IDE_TFLAG_OUT_LBAM) |
| 110 | + tx4938ide_outb(tf->lbam, io_ports->lbam_addr); |
| 111 | + if (task->tf_flags & IDE_TFLAG_OUT_LBAH) |
| 112 | + tx4938ide_outb(tf->lbah, io_ports->lbah_addr); |
| 113 | + |
| 114 | + if (task->tf_flags & IDE_TFLAG_OUT_DEVICE) |
| 115 | + tx4938ide_outb((tf->device & HIHI) | drive->select, |
| 116 | + io_ports->device_addr); |
| 117 | +} |
| 118 | + |
| 119 | +static void tx4938ide_tf_read(ide_drive_t *drive, ide_task_t *task) |
| 120 | +{ |
| 121 | + ide_hwif_t *hwif = drive->hwif; |
| 122 | + struct ide_io_ports *io_ports = &hwif->io_ports; |
| 123 | + struct ide_taskfile *tf = &task->tf; |
| 124 | + |
| 125 | + if (task->tf_flags & IDE_TFLAG_IN_DATA) { |
| 126 | + u16 data; |
| 127 | + |
| 128 | + /* no endian swap */ |
| 129 | + data = __raw_readw((void __iomem *)io_ports->data_addr); |
| 130 | + tf->data = data & 0xff; |
| 131 | + tf->hob_data = (data >> 8) & 0xff; |
| 132 | + } |
| 133 | + |
| 134 | + /* be sure we're looking at the low order bits */ |
| 135 | + tx4938ide_outb(ATA_DEVCTL_OBS & ~0x80, io_ports->ctl_addr); |
| 136 | + |
| 137 | + if (task->tf_flags & IDE_TFLAG_IN_FEATURE) |
| 138 | + tf->feature = tx4938ide_inb(io_ports->feature_addr); |
| 139 | + if (task->tf_flags & IDE_TFLAG_IN_NSECT) |
| 140 | + tf->nsect = tx4938ide_inb(io_ports->nsect_addr); |
| 141 | + if (task->tf_flags & IDE_TFLAG_IN_LBAL) |
| 142 | + tf->lbal = tx4938ide_inb(io_ports->lbal_addr); |
| 143 | + if (task->tf_flags & IDE_TFLAG_IN_LBAM) |
| 144 | + tf->lbam = tx4938ide_inb(io_ports->lbam_addr); |
| 145 | + if (task->tf_flags & IDE_TFLAG_IN_LBAH) |
| 146 | + tf->lbah = tx4938ide_inb(io_ports->lbah_addr); |
| 147 | + if (task->tf_flags & IDE_TFLAG_IN_DEVICE) |
| 148 | + tf->device = tx4938ide_inb(io_ports->device_addr); |
| 149 | + |
| 150 | + if (task->tf_flags & IDE_TFLAG_LBA48) { |
| 151 | + tx4938ide_outb(ATA_DEVCTL_OBS | 0x80, io_ports->ctl_addr); |
| 152 | + |
| 153 | + if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE) |
| 154 | + tf->hob_feature = |
| 155 | + tx4938ide_inb(io_ports->feature_addr); |
| 156 | + if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT) |
| 157 | + tf->hob_nsect = tx4938ide_inb(io_ports->nsect_addr); |
| 158 | + if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL) |
| 159 | + tf->hob_lbal = tx4938ide_inb(io_ports->lbal_addr); |
| 160 | + if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM) |
| 161 | + tf->hob_lbam = tx4938ide_inb(io_ports->lbam_addr); |
| 162 | + if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH) |
| 163 | + tf->hob_lbah = tx4938ide_inb(io_ports->lbah_addr); |
| 164 | + } |
| 165 | +} |
| 166 | + |
| 167 | +static void tx4938ide_input_data_swap(ide_drive_t *drive, struct request *rq, |
| 168 | + void *buf, unsigned int len) |
| 169 | +{ |
| 170 | + unsigned long port = drive->hwif->io_ports.data_addr; |
| 171 | + unsigned short *ptr = buf; |
| 172 | + unsigned int count = (len + 1) / 2; |
| 173 | + |
| 174 | + while (count--) |
| 175 | + *ptr++ = cpu_to_le16(__raw_readw((void __iomem *)port)); |
| 176 | + __ide_flush_dcache_range((unsigned long)buf, count * 2); |
| 177 | +} |
| 178 | + |
| 179 | +static void tx4938ide_output_data_swap(ide_drive_t *drive, struct request *rq, |
| 180 | + void *buf, unsigned int len) |
| 181 | +{ |
| 182 | + unsigned long port = drive->hwif->io_ports.data_addr; |
| 183 | + unsigned short *ptr = buf; |
| 184 | + unsigned int count = (len + 1) / 2; |
| 185 | + |
| 186 | + while (count--) { |
| 187 | + __raw_writew(le16_to_cpu(*ptr), (void __iomem *)port); |
| 188 | + ptr++; |
| 189 | + } |
| 190 | + __ide_flush_dcache_range((unsigned long)buf, count * 2); |
| 191 | +} |
| 192 | + |
| 193 | +static const struct ide_tp_ops tx4938ide_tp_ops = { |
| 194 | + .exec_command = ide_exec_command, |
| 195 | + .read_status = ide_read_status, |
| 196 | + .read_altstatus = ide_read_altstatus, |
| 197 | + .read_sff_dma_status = ide_read_sff_dma_status, |
| 198 | + |
| 199 | + .set_irq = ide_set_irq, |
| 200 | + |
| 201 | + .tf_load = tx4938ide_tf_load, |
| 202 | + .tf_read = tx4938ide_tf_read, |
| 203 | + |
| 204 | + .input_data = tx4938ide_input_data_swap, |
| 205 | + .output_data = tx4938ide_output_data_swap, |
| 206 | +}; |
| 207 | + |
| 208 | +#endif /* __BIG_ENDIAN */ |
| 209 | + |
| 210 | +static const struct ide_port_ops tx4938ide_port_ops = { |
| 211 | + .set_pio_mode = tx4938ide_set_pio_mode, |
| 212 | +}; |
| 213 | + |
| 214 | +static const struct ide_port_info tx4938ide_port_info __initdata = { |
| 215 | + .port_ops = &tx4938ide_port_ops, |
| 216 | +#ifdef __BIG_ENDIAN |
| 217 | + .tp_ops = &tx4938ide_tp_ops, |
| 218 | +#endif |
| 219 | + .host_flags = IDE_HFLAG_MMIO | IDE_HFLAG_NO_DMA, |
| 220 | + .pio_mask = ATA_PIO5, |
| 221 | +}; |
| 222 | + |
| 223 | +static int __init tx4938ide_probe(struct platform_device *pdev) |
| 224 | +{ |
| 225 | + hw_regs_t hw; |
| 226 | + hw_regs_t *hws[] = { &hw, NULL, NULL, NULL }; |
| 227 | + struct ide_host *host; |
| 228 | + struct resource *res; |
| 229 | + struct tx4938ide_platform_info *pdata = pdev->dev.platform_data; |
| 230 | + int irq, ret, i; |
| 231 | + unsigned long mapbase; |
| 232 | + struct ide_port_info d = tx4938ide_port_info; |
| 233 | + |
| 234 | + irq = platform_get_irq(pdev, 0); |
| 235 | + if (irq < 0) |
| 236 | + return -ENODEV; |
| 237 | + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 238 | + if (!res) |
| 239 | + return -ENODEV; |
| 240 | + |
| 241 | + if (!devm_request_mem_region(&pdev->dev, res->start, |
| 242 | + res->end - res->start + 1, "tx4938ide")) |
| 243 | + return -EBUSY; |
| 244 | + mapbase = (unsigned long)devm_ioremap(&pdev->dev, res->start, |
| 245 | + res->end - res->start + 1); |
| 246 | + if (!mapbase) |
| 247 | + return -EBUSY; |
| 248 | + |
| 249 | + memset(&hw, 0, sizeof(hw)); |
| 250 | + if (pdata->ioport_shift) { |
| 251 | + unsigned long port = mapbase; |
| 252 | + |
| 253 | + hw.io_ports_array[0] = port; |
| 254 | +#ifdef __BIG_ENDIAN |
| 255 | + port++; |
| 256 | +#endif |
| 257 | + for (i = 1; i <= 7; i++) |
| 258 | + hw.io_ports_array[i] = |
| 259 | + port + (i << pdata->ioport_shift); |
| 260 | + hw.io_ports.ctl_addr = |
| 261 | + port + 0x10000 + (6 << pdata->ioport_shift); |
| 262 | + } else |
| 263 | + ide_std_init_ports(&hw, mapbase, mapbase + 0x10006); |
| 264 | + hw.irq = irq; |
| 265 | + hw.dev = &pdev->dev; |
| 266 | + |
| 267 | + pr_info("TX4938 IDE interface (base %#lx, irq %d)\n", mapbase, hw.irq); |
| 268 | + if (pdata->gbus_clock) |
| 269 | + tx4938ide_tune_ebusc(pdata->ebus_ch, pdata->gbus_clock, 0); |
| 270 | + else |
| 271 | + d.port_ops = NULL; |
| 272 | + ret = ide_host_add(&d, hws, &host); |
| 273 | + if (ret) |
| 274 | + return ret; |
| 275 | + platform_set_drvdata(pdev, host); |
| 276 | + return 0; |
| 277 | +} |
| 278 | + |
| 279 | +static int __exit tx4938ide_remove(struct platform_device *pdev) |
| 280 | +{ |
| 281 | + struct ide_host *host = platform_get_drvdata(pdev); |
| 282 | + |
| 283 | + ide_host_remove(host); |
| 284 | + return 0; |
| 285 | +} |
| 286 | + |
| 287 | +static struct platform_driver tx4938ide_driver = { |
| 288 | + .driver = { |
| 289 | + .name = "tx4938ide", |
| 290 | + .owner = THIS_MODULE, |
| 291 | + }, |
| 292 | + .remove = __exit_p(tx4938ide_remove), |
| 293 | +}; |
| 294 | + |
| 295 | +static int __init tx4938ide_init(void) |
| 296 | +{ |
| 297 | + return platform_driver_probe(&tx4938ide_driver, tx4938ide_probe); |
| 298 | +} |
| 299 | + |
| 300 | +static void __exit tx4938ide_exit(void) |
| 301 | +{ |
| 302 | + platform_driver_unregister(&tx4938ide_driver); |
| 303 | +} |
| 304 | + |
| 305 | +module_init(tx4938ide_init); |
| 306 | +module_exit(tx4938ide_exit); |
| 307 | + |
| 308 | +MODULE_DESCRIPTION("TX4938 internal IDE driver"); |
| 309 | +MODULE_LICENSE("GPL"); |
| 310 | +MODULE_ALIAS("platform:tx4938ide"); |
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