@@ -55,7 +55,8 @@ void pcicore_write16(struct ssb_pcicore *pc, u16 offset, u16 value)
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#include <asm/paccess.h>
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/* Probe a 32bit value on the bus and catch bus exceptions.
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* Returns nonzero on a bus exception.
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- * This is MIPS specific */
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+ * This is MIPS specific
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+ */
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#define mips_busprobe32 (val , addr ) get_dbe((val), ((u32 *)(addr)))
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/* Assume one-hot slot wiring */
@@ -255,7 +256,8 @@ static struct pci_controller ssb_pcicore_controller = {
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};
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/* This function is called when doing a pci_enable_device().
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- * We must first check if the device is a device on the PCI-core bridge. */
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+ * We must first check if the device is a device on the PCI-core bridge.
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+ */
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int ssb_pcicore_plat_dev_init (struct pci_dev * d )
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{
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if (d -> bus -> ops != & ssb_pcicore_pciops ) {
@@ -381,11 +383,13 @@ static void ssb_pcicore_init_hostmode(struct ssb_pcicore *pc)
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/* Ok, ready to run, register it to the system.
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* The following needs change, if we want to port hostmode
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- * to non-MIPS platform. */
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+ * to non-MIPS platform.
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+ */
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ssb_pcicore_controller .io_map_base = (unsigned long )ioremap (SSB_PCI_MEM , 0x04000000 );
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set_io_port_base (ssb_pcicore_controller .io_map_base );
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/* Give some time to the PCI controller to configure itself with the new
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- * values. Not waiting at this point causes crashes of the machine. */
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+ * values. Not waiting at this point causes crashes of the machine.
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+ */
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mdelay (10 );
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register_pci_controller (& ssb_pcicore_controller );
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}
@@ -405,7 +409,8 @@ static int pcicore_is_in_hostmode(struct ssb_pcicore *pc)
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return 0 ;
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/* The 200-pin BCM4712 package does not bond out PCI. Even when
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- * PCI is bonded out, some boards may leave the pins floating. */
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+ * PCI is bonded out, some boards may leave the pins floating.
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+ */
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if (bus -> chip_id == 0x4712 ) {
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if (bus -> chip_package == SSB_CHIPPACK_BCM4712S )
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return 0 ;
@@ -685,7 +690,8 @@ int ssb_pcicore_dev_irqvecs_enable(struct ssb_pcicore *pc,
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if (dev -> bus -> bustype != SSB_BUSTYPE_PCI ) {
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/* This SSB device is not on a PCI host-bus. So the IRQs are
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* not routed through the PCI core.
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- * So we must not enable routing through the PCI core. */
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+ * So we must not enable routing through the PCI core.
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+ */
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goto out ;
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}
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