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AxelLinbroonie
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ASoC: wm8961 - clear WM8961_MCLKDIV bit for freq <= 16500000
MCLKDIV bit of Register 04h Clocking1: 0 : Divide by 1 1 : Divide by 2 Thus in the case of freq <= 16500000, we should clear MCLKDIV bit. Signed-off-by: Axel Lin <[email protected]> Acked-by: Liam Girdwood <[email protected]> Signed-off-by: Mark Brown <[email protected]> Cc: [email protected]
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sound/soc/codecs/wm8961.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -736,7 +736,7 @@ static int wm8961_set_sysclk(struct snd_soc_dai *dai, int clk_id,
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freq /= 2;
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} else {
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dev_dbg(codec->dev, "Using MCLK/1 for %dHz MCLK\n", freq);
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reg &= WM8961_MCLKDIV;
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reg &= ~WM8961_MCLKDIV;
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}
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snd_soc_write(codec, WM8961_CLOCKING1, reg);

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