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Dotan BarakMukesh Kacker
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mlx4_core: enable changing default max HCA resource limits.
Enable module-initialization time modification of default HCA maximum resource limits via module parameters, as is done in mthca. Specify the log of the parameter value, rather than the value itself to avoid the hidden side-effect of rounding up values to next power-of-2. For mtt's, there is a heuristic in place to configure twice the number of MTTs required to cover host memory. This heuristic is modified slightly to guarantee a minimum of 2^20 mtt's, and is used when the user does not set the log_num_mtts module parameter. If the log_num_mtt's module parameter is set by the user, the value set for log_num_mtts will be used as-is (instead of the heuristic). V2: Adapted for rebase to kernel 3.7-rc4 Signed-off-by: Jack Morgenstein <[email protected]> Signed-off-by: Dotan Barak <[email protected]> Reviewed-by: Jack Morgenstein <[email protected]> Signed-off-by: Vladimir Sokolovsky <[email protected]> Signed-off-by: Jack Morgenstein <[email protected]> (Ported from Mellanox OFED 2.4) Signed-off-by: Mukesh Kacker <[email protected]>
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drivers/net/ethernet/mellanox/mlx4/main.c

Lines changed: 74 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -114,16 +114,6 @@ static char mlx4_version[] =
114114
DRV_NAME ": Mellanox ConnectX core driver v"
115115
DRV_VERSION " (" DRV_RELDATE ")\n";
116116

117-
static struct mlx4_profile default_profile = {
118-
.num_qp = 1 << 18,
119-
.num_srq = 1 << 16,
120-
.rdmarc_per_qp = 1 << 4,
121-
.num_cq = 1 << 16,
122-
.num_mcg = 1 << 13,
123-
.num_mpt = 1 << 19,
124-
.num_mtt = 1 << 20, /* It is really num mtt segements */
125-
};
126-
127117
static struct mlx4_profile low_mem_profile = {
128118
.num_qp = 1 << 17,
129119
.num_srq = 1 << 6,
@@ -168,6 +158,79 @@ struct mlx4_port_config {
168158

169159
static atomic_t pf_loading = ATOMIC_INIT(0);
170160

161+
#define MLX4_LOG_NUM_MTT 20
162+
static struct mlx4_profile mod_param_profile = {
163+
.num_qp = 18,
164+
.num_srq = 16,
165+
.rdmarc_per_qp = 4,
166+
.num_cq = 16,
167+
.num_mcg = 13,
168+
.num_mpt = 19,
169+
.num_mtt = 0, /* max(20, 2*MTTs for host memory)) */
170+
};
171+
172+
module_param_named(log_num_qp, mod_param_profile.num_qp, int, 0444);
173+
MODULE_PARM_DESC(log_num_qp, "log maximum number of QPs per HCA (default: 18)");
174+
175+
module_param_named(log_num_srq, mod_param_profile.num_srq, int, 0444);
176+
MODULE_PARM_DESC(log_num_srq, "log maximum number of SRQs per HCA "
177+
"(default: 16)");
178+
179+
module_param_named(log_rdmarc_per_qp, mod_param_profile.rdmarc_per_qp, int,
180+
0444);
181+
MODULE_PARM_DESC(log_rdmarc_per_qp, "log number of RDMARC buffers per QP "
182+
"(default: 4)");
183+
184+
module_param_named(log_num_cq, mod_param_profile.num_cq, int, 0444);
185+
MODULE_PARM_DESC(log_num_cq, "log maximum number of CQs per HCA (default: 16)");
186+
187+
module_param_named(log_num_mcg, mod_param_profile.num_mcg, int, 0444);
188+
MODULE_PARM_DESC(log_num_mcg, "log maximum number of multicast groups per HCA "
189+
"(default: 13)");
190+
191+
module_param_named(log_num_mpt, mod_param_profile.num_mpt, int, 0444);
192+
MODULE_PARM_DESC(log_num_mpt,
193+
"log maximum number of memory protection table entries per "
194+
"HCA (default: 19)");
195+
196+
module_param_named(log_num_mtt, mod_param_profile.num_mtt, int, 0444);
197+
MODULE_PARM_DESC(log_num_mtt,
198+
"log maximum number of memory translation table segments per "
199+
"HCA (default: max(20, 2*MTTs for register all of the host memory))");
200+
201+
static void process_mod_param_profile(struct mlx4_profile *profile)
202+
{
203+
struct sysinfo si;
204+
205+
profile->num_qp = 1 << mod_param_profile.num_qp;
206+
profile->num_srq = 1 << mod_param_profile.num_srq;
207+
profile->rdmarc_per_qp = 1 << mod_param_profile.rdmarc_per_qp;
208+
profile->num_cq = 1 << mod_param_profile.num_cq;
209+
profile->num_mcg = 1 << mod_param_profile.num_mcg;
210+
profile->num_mpt = 1 << mod_param_profile.num_mpt;
211+
/*
212+
* We want to scale the number of MTTs with the size of the
213+
* system memory, since it makes sense to register a lot of
214+
* memory on a system with a lot of memory. As a heuristic,
215+
* make sure we have enough MTTs to register twice the system
216+
* memory (with PAGE_SIZE entries).
217+
*
218+
* This number has to be a power of two and fit into 32 bits
219+
* due to device limitations, so cap this at 2^31 as well.
220+
* That limits us to 8TB of memory registration per HCA with
221+
* 4KB pages, which is probably OK for the next few months.
222+
*/
223+
if (mod_param_profile.num_mtt)
224+
profile->num_mtt = 1 << mod_param_profile.num_mtt;
225+
else {
226+
si_meminfo(&si);
227+
profile->num_mtt =
228+
roundup_pow_of_two(max_t(unsigned, 1 << MLX4_LOG_NUM_MTT,
229+
min(1UL << 31,
230+
si.totalram >> (log_mtts_per_seg - 1))));
231+
}
232+
}
233+
171234
int mlx4_check_port_params(struct mlx4_dev *dev,
172235
enum mlx4_port_type *port_type)
173236
{
@@ -2031,7 +2094,7 @@ static int mlx4_init_hca(struct mlx4_dev *dev)
20312094
mlx4_info(dev, "Running from within kdump kernel. Using low memory profile\n");
20322095
profile = low_mem_profile;
20332096
} else {
2034-
profile = default_profile;
2097+
process_mod_param_profile(&profile);
20352098
}
20362099
if (dev->caps.steering_mode ==
20372100
MLX4_STEERING_MODE_DEVICE_MANAGED)

drivers/net/ethernet/mellanox/mlx4/profile.c

Lines changed: 0 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -83,31 +83,12 @@ u64 mlx4_make_profile(struct mlx4_dev *dev,
8383
u64 total_size = 0;
8484
struct mlx4_resource *profile;
8585
struct mlx4_resource tmp;
86-
struct sysinfo si;
8786
int i, j;
8887

8988
profile = kcalloc(MLX4_RES_NUM, sizeof(*profile), GFP_KERNEL);
9089
if (!profile)
9190
return -ENOMEM;
9291

93-
/*
94-
* We want to scale the number of MTTs with the size of the
95-
* system memory, since it makes sense to register a lot of
96-
* memory on a system with a lot of memory. As a heuristic,
97-
* make sure we have enough MTTs to cover twice the system
98-
* memory (with PAGE_SIZE entries).
99-
*
100-
* This number has to be a power of two and fit into 32 bits
101-
* due to device limitations, so cap this at 2^31 as well.
102-
* That limits us to 8TB of memory registration per HCA with
103-
* 4KB pages, which is probably OK for the next few months.
104-
*/
105-
si_meminfo(&si);
106-
request->num_mtt =
107-
roundup_pow_of_two(max_t(unsigned, request->num_mtt,
108-
min(1UL << (31 - log_mtts_per_seg),
109-
si.totalram >> (log_mtts_per_seg - 1))));
110-
11192
profile[MLX4_RES_QP].size = dev_cap->qpc_entry_sz;
11293
profile[MLX4_RES_RDMARC].size = dev_cap->rdmarc_entry_sz;
11394
profile[MLX4_RES_ALTC].size = dev_cap->altc_entry_sz;

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