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torvaldstorvalds
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Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk driver fixes from Stephen Boyd: "An assortment of vendor specific clk drivers fixes, most notably fallout from adding Tegra210 and rockchip rk3036/rk3368 drivers this cycle. There's also the random smattering of sparse/checker fixes, a build "fix" to get the Tango clk driver to compile because the Kconfig symbol was renamed after the fact, and a clk gpio fix for a patch mismerge" * tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (28 commits) clk: gpio: Really allow an optional clock= DT property Revert "clk: qcom: Specify LE device endianness" clk: versatile: mask VCO bits before writing clk: tegra: super: Fix sparse warnings for functions not declared as static clk: tegra: Fix sparse warnings for functions not declared as static clk: tegra: Fix sparse warning for pll_m clk: tegra: Use definition for pll_u override bit clk: tegra: Fix warning caused by pll_u failing to lock clk: tegra: Fix clock sources for Tegra210 EMC clk: tegra: Add the APB2APE audio clock on Tegra210 clk: tegra: Add missing of_node_put() clk: tegra: Fix PLLE SS coefficients clk: tegra: Fix typos around clearing PLLE bits during enable clk: tegra: Do not disable PLLE when under hardware control clk: tegra: Fix pllx dyn step calculation clk: tegra: pll: Fix potential sleeping-while-atomic clk: tegra: Fix the misnaming of nvenc from msenc clk: tegra: Fix naming of MISC registers clk: tango4: rename ARCH_TANGOX to ARCH_TANGO clk: scpi: Fix checking return value of platform_device_register_simple() ...
2 parents a703f42 + 4462b4b commit 37aa4da

26 files changed

+138
-142
lines changed

‎Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@ that they are defined using standard clock bindings with following
3030
clock-output-names:
3131
- "xin24m" - crystal input - required,
3232
- "ext_i2s" - external I2S clock - optional,
33-
- "ext_gmac" - external GMAC clock - optional
33+
- "rmii_clkin" - external EMAC clock - optional
3434

3535
Example: Clock controller node:
3636

‎drivers/clk/Makefile

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@ obj-$(CONFIG_COMMON_CLK_SI514) += clk-si514.o
4343
obj-$(CONFIG_COMMON_CLK_SI570) += clk-si570.o
4444
obj-$(CONFIG_COMMON_CLK_CDCE925) += clk-cdce925.o
4545
obj-$(CONFIG_ARCH_STM32) += clk-stm32f4.o
46-
obj-$(CONFIG_ARCH_TANGOX) += clk-tango4.o
46+
obj-$(CONFIG_ARCH_TANGO) += clk-tango4.o
4747
obj-$(CONFIG_CLK_TWL6040) += clk-twl6040.o
4848
obj-$(CONFIG_ARCH_U300) += clk-u300.o
4949
obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o

‎drivers/clk/clk-gpio.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -289,7 +289,7 @@ static void __init of_gpio_clk_setup(struct device_node *node,
289289

290290
num_parents = of_clk_get_parent_count(node);
291291
if (num_parents < 0)
292-
return;
292+
num_parents = 0;
293293

294294
data = kzalloc(sizeof(*data), GFP_KERNEL);
295295
if (!data)

‎drivers/clk/clk-scpi.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -299,7 +299,7 @@ static int scpi_clocks_probe(struct platform_device *pdev)
299299
/* Add the virtual cpufreq device */
300300
cpufreq_dev = platform_device_register_simple("scpi-cpufreq",
301301
-1, NULL, 0);
302-
if (!cpufreq_dev)
302+
if (IS_ERR(cpufreq_dev))
303303
pr_warn("unable to register cpufreq device");
304304

305305
return 0;

‎drivers/clk/mvebu/dove-divider.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -247,7 +247,7 @@ static struct clk_onecell_data dove_divider_data = {
247247

248248
void __init dove_divider_clk_init(struct device_node *np)
249249
{
250-
void *base;
250+
void __iomem *base;
251251

252252
base = of_iomap(np, 0);
253253
if (WARN_ON(!base))

‎drivers/clk/qcom/gcc-apq8084.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3587,7 +3587,6 @@ static const struct regmap_config gcc_apq8084_regmap_config = {
35873587
.val_bits = 32,
35883588
.max_register = 0x1fc0,
35893589
.fast_io = true,
3590-
.val_format_endian = REGMAP_ENDIAN_LITTLE,
35913590
};
35923591

35933592
static const struct qcom_cc_desc gcc_apq8084_desc = {

‎drivers/clk/qcom/gcc-ipq806x.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3005,7 +3005,6 @@ static const struct regmap_config gcc_ipq806x_regmap_config = {
30053005
.val_bits = 32,
30063006
.max_register = 0x3e40,
30073007
.fast_io = true,
3008-
.val_format_endian = REGMAP_ENDIAN_LITTLE,
30093008
};
30103009

30113010
static const struct qcom_cc_desc gcc_ipq806x_desc = {

‎drivers/clk/qcom/gcc-msm8660.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2702,7 +2702,6 @@ static const struct regmap_config gcc_msm8660_regmap_config = {
27022702
.val_bits = 32,
27032703
.max_register = 0x363c,
27042704
.fast_io = true,
2705-
.val_format_endian = REGMAP_ENDIAN_LITTLE,
27062705
};
27072706

27082707
static const struct qcom_cc_desc gcc_msm8660_desc = {

‎drivers/clk/qcom/gcc-msm8916.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3336,7 +3336,6 @@ static const struct regmap_config gcc_msm8916_regmap_config = {
33363336
.val_bits = 32,
33373337
.max_register = 0x80000,
33383338
.fast_io = true,
3339-
.val_format_endian = REGMAP_ENDIAN_LITTLE,
33403339
};
33413340

33423341
static const struct qcom_cc_desc gcc_msm8916_desc = {

‎drivers/clk/qcom/gcc-msm8960.c

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3468,7 +3468,6 @@ static const struct regmap_config gcc_msm8960_regmap_config = {
34683468
.val_bits = 32,
34693469
.max_register = 0x3660,
34703470
.fast_io = true,
3471-
.val_format_endian = REGMAP_ENDIAN_LITTLE,
34723471
};
34733472

34743473
static const struct regmap_config gcc_apq8064_regmap_config = {
@@ -3477,7 +3476,6 @@ static const struct regmap_config gcc_apq8064_regmap_config = {
34773476
.val_bits = 32,
34783477
.max_register = 0x3880,
34793478
.fast_io = true,
3480-
.val_format_endian = REGMAP_ENDIAN_LITTLE,
34813479
};
34823480

34833481
static const struct qcom_cc_desc gcc_msm8960_desc = {

‎drivers/clk/qcom/gcc-msm8974.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2680,7 +2680,6 @@ static const struct regmap_config gcc_msm8974_regmap_config = {
26802680
.val_bits = 32,
26812681
.max_register = 0x1fc0,
26822682
.fast_io = true,
2683-
.val_format_endian = REGMAP_ENDIAN_LITTLE,
26842683
};
26852684

26862685
static const struct qcom_cc_desc gcc_msm8974_desc = {

‎drivers/clk/qcom/lcc-ipq806x.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -419,7 +419,6 @@ static const struct regmap_config lcc_ipq806x_regmap_config = {
419419
.val_bits = 32,
420420
.max_register = 0xfc,
421421
.fast_io = true,
422-
.val_format_endian = REGMAP_ENDIAN_LITTLE,
423422
};
424423

425424
static const struct qcom_cc_desc lcc_ipq806x_desc = {

‎drivers/clk/qcom/lcc-msm8960.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -524,7 +524,6 @@ static const struct regmap_config lcc_msm8960_regmap_config = {
524524
.val_bits = 32,
525525
.max_register = 0xfc,
526526
.fast_io = true,
527-
.val_format_endian = REGMAP_ENDIAN_LITTLE,
528527
};
529528

530529
static const struct qcom_cc_desc lcc_msm8960_desc = {

‎drivers/clk/qcom/mmcc-apq8084.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3368,7 +3368,6 @@ static const struct regmap_config mmcc_apq8084_regmap_config = {
33683368
.val_bits = 32,
33693369
.max_register = 0x5104,
33703370
.fast_io = true,
3371-
.val_format_endian = REGMAP_ENDIAN_LITTLE,
33723371
};
33733372

33743373
static const struct qcom_cc_desc mmcc_apq8084_desc = {

‎drivers/clk/qcom/mmcc-msm8960.c

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3029,7 +3029,6 @@ static const struct regmap_config mmcc_msm8960_regmap_config = {
30293029
.val_bits = 32,
30303030
.max_register = 0x334,
30313031
.fast_io = true,
3032-
.val_format_endian = REGMAP_ENDIAN_LITTLE,
30333032
};
30343033

30353034
static const struct regmap_config mmcc_apq8064_regmap_config = {
@@ -3038,7 +3037,6 @@ static const struct regmap_config mmcc_apq8064_regmap_config = {
30383037
.val_bits = 32,
30393038
.max_register = 0x350,
30403039
.fast_io = true,
3041-
.val_format_endian = REGMAP_ENDIAN_LITTLE,
30423040
};
30433041

30443042
static const struct qcom_cc_desc mmcc_msm8960_desc = {

‎drivers/clk/qcom/mmcc-msm8974.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2594,7 +2594,6 @@ static const struct regmap_config mmcc_msm8974_regmap_config = {
25942594
.val_bits = 32,
25952595
.max_register = 0x5104,
25962596
.fast_io = true,
2597-
.val_format_endian = REGMAP_ENDIAN_LITTLE,
25982597
};
25992598

26002599
static const struct qcom_cc_desc mmcc_msm8974_desc = {

‎drivers/clk/rockchip/clk-rk3036.c

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -133,7 +133,7 @@ PNAME(mux_spdif_p) = { "spdif_src", "spdif_frac", "xin12m" };
133133
PNAME(mux_uart0_p) = { "uart0_src", "uart0_frac", "xin24m" };
134134
PNAME(mux_uart1_p) = { "uart1_src", "uart1_frac", "xin24m" };
135135
PNAME(mux_uart2_p) = { "uart2_src", "uart2_frac", "xin24m" };
136-
PNAME(mux_mac_p) = { "mac_pll_src", "ext_gmac" };
136+
PNAME(mux_mac_p) = { "mac_pll_src", "rmii_clkin" };
137137
PNAME(mux_dclk_p) = { "dclk_lcdc", "dclk_cru" };
138138

139139
static struct rockchip_pll_clock rk3036_pll_clks[] __initdata = {
@@ -224,16 +224,16 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = {
224224
RK2928_CLKGATE_CON(2), 2, GFLAGS),
225225

226226
COMPOSITE_NODIV(SCLK_TIMER0, "sclk_timer0", mux_timer_p, CLK_IGNORE_UNUSED,
227-
RK2928_CLKSEL_CON(2), 4, 1, DFLAGS,
227+
RK2928_CLKSEL_CON(2), 4, 1, MFLAGS,
228228
RK2928_CLKGATE_CON(1), 0, GFLAGS),
229229
COMPOSITE_NODIV(SCLK_TIMER1, "sclk_timer1", mux_timer_p, CLK_IGNORE_UNUSED,
230-
RK2928_CLKSEL_CON(2), 5, 1, DFLAGS,
230+
RK2928_CLKSEL_CON(2), 5, 1, MFLAGS,
231231
RK2928_CLKGATE_CON(1), 1, GFLAGS),
232232
COMPOSITE_NODIV(SCLK_TIMER2, "sclk_timer2", mux_timer_p, CLK_IGNORE_UNUSED,
233-
RK2928_CLKSEL_CON(2), 6, 1, DFLAGS,
233+
RK2928_CLKSEL_CON(2), 6, 1, MFLAGS,
234234
RK2928_CLKGATE_CON(2), 4, GFLAGS),
235235
COMPOSITE_NODIV(SCLK_TIMER3, "sclk_timer3", mux_timer_p, CLK_IGNORE_UNUSED,
236-
RK2928_CLKSEL_CON(2), 7, 1, DFLAGS,
236+
RK2928_CLKSEL_CON(2), 7, 1, MFLAGS,
237237
RK2928_CLKGATE_CON(2), 5, GFLAGS),
238238

239239
MUX(0, "uart_pll_clk", mux_pll_src_apll_dpll_gpll_usb480m_p, 0,
@@ -242,11 +242,11 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = {
242242
RK2928_CLKSEL_CON(13), 0, 7, DFLAGS,
243243
RK2928_CLKGATE_CON(1), 8, GFLAGS),
244244
COMPOSITE_NOMUX(0, "uart1_src", "uart_pll_clk", 0,
245-
RK2928_CLKSEL_CON(13), 0, 7, DFLAGS,
246-
RK2928_CLKGATE_CON(1), 8, GFLAGS),
245+
RK2928_CLKSEL_CON(14), 0, 7, DFLAGS,
246+
RK2928_CLKGATE_CON(1), 10, GFLAGS),
247247
COMPOSITE_NOMUX(0, "uart2_src", "uart_pll_clk", 0,
248-
RK2928_CLKSEL_CON(13), 0, 7, DFLAGS,
249-
RK2928_CLKGATE_CON(1), 8, GFLAGS),
248+
RK2928_CLKSEL_CON(15), 0, 7, DFLAGS,
249+
RK2928_CLKGATE_CON(1), 12, GFLAGS),
250250
COMPOSITE_FRACMUX(0, "uart0_frac", "uart0_src", CLK_SET_RATE_PARENT,
251251
RK2928_CLKSEL_CON(17), 0,
252252
RK2928_CLKGATE_CON(1), 9, GFLAGS,
@@ -279,13 +279,13 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = {
279279
RK2928_CLKGATE_CON(3), 2, GFLAGS),
280280

281281
COMPOSITE_NODIV(0, "sclk_sdmmc_src", mux_mmc_src_p, 0,
282-
RK2928_CLKSEL_CON(12), 8, 2, DFLAGS,
282+
RK2928_CLKSEL_CON(12), 8, 2, MFLAGS,
283283
RK2928_CLKGATE_CON(2), 11, GFLAGS),
284284
DIV(SCLK_SDMMC, "sclk_sdmmc", "sclk_sdmmc_src", 0,
285285
RK2928_CLKSEL_CON(11), 0, 7, DFLAGS),
286286

287287
COMPOSITE_NODIV(0, "sclk_sdio_src", mux_mmc_src_p, 0,
288-
RK2928_CLKSEL_CON(12), 10, 2, DFLAGS,
288+
RK2928_CLKSEL_CON(12), 10, 2, MFLAGS,
289289
RK2928_CLKGATE_CON(2), 13, GFLAGS),
290290
DIV(SCLK_SDIO, "sclk_sdio", "sclk_sdio_src", 0,
291291
RK2928_CLKSEL_CON(11), 8, 7, DFLAGS),
@@ -344,12 +344,12 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = {
344344
RK2928_CLKGATE_CON(10), 5, GFLAGS),
345345

346346
COMPOSITE_NOGATE(0, "mac_pll_src", mux_pll_src_3plls_p, 0,
347-
RK2928_CLKSEL_CON(21), 0, 2, MFLAGS, 4, 5, DFLAGS),
347+
RK2928_CLKSEL_CON(21), 0, 2, MFLAGS, 9, 5, DFLAGS),
348348
MUX(SCLK_MACREF, "mac_clk_ref", mux_mac_p, CLK_SET_RATE_PARENT,
349349
RK2928_CLKSEL_CON(21), 3, 1, MFLAGS),
350350

351351
COMPOSITE_NOMUX(SCLK_MAC, "mac_clk", "mac_clk_ref", 0,
352-
RK2928_CLKSEL_CON(21), 9, 5, DFLAGS,
352+
RK2928_CLKSEL_CON(21), 4, 5, DFLAGS,
353353
RK2928_CLKGATE_CON(2), 6, GFLAGS),
354354

355355
MUX(SCLK_HDMI, "dclk_hdmi", mux_dclk_p, 0,

‎drivers/clk/rockchip/clk-rk3368.c

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -780,13 +780,13 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = {
780780
GATE(PCLK_TSADC, "pclk_tsadc", "pclk_peri", 0, RK3368_CLKGATE_CON(20), 0, GFLAGS),
781781

782782
/* pclk_pd_alive gates */
783-
GATE(PCLK_TIMER1, "pclk_timer1", "pclk_pd_alive", 0, RK3368_CLKGATE_CON(14), 8, GFLAGS),
784-
GATE(PCLK_TIMER0, "pclk_timer0", "pclk_pd_alive", 0, RK3368_CLKGATE_CON(14), 7, GFLAGS),
785-
GATE(0, "pclk_alive_niu", "pclk_pd_alive", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(14), 12, GFLAGS),
786-
GATE(PCLK_GRF, "pclk_grf", "pclk_pd_alive", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(14), 11, GFLAGS),
787-
GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_pd_alive", 0, RK3368_CLKGATE_CON(14), 3, GFLAGS),
788-
GATE(PCLK_GPIO2, "pclk_gpio2", "pclk_pd_alive", 0, RK3368_CLKGATE_CON(14), 2, GFLAGS),
789-
GATE(PCLK_GPIO1, "pclk_gpio1", "pclk_pd_alive", 0, RK3368_CLKGATE_CON(14), 1, GFLAGS),
783+
GATE(PCLK_TIMER1, "pclk_timer1", "pclk_pd_alive", 0, RK3368_CLKGATE_CON(22), 13, GFLAGS),
784+
GATE(PCLK_TIMER0, "pclk_timer0", "pclk_pd_alive", 0, RK3368_CLKGATE_CON(22), 12, GFLAGS),
785+
GATE(0, "pclk_alive_niu", "pclk_pd_alive", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(22), 9, GFLAGS),
786+
GATE(PCLK_GRF, "pclk_grf", "pclk_pd_alive", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(22), 8, GFLAGS),
787+
GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_pd_alive", 0, RK3368_CLKGATE_CON(22), 3, GFLAGS),
788+
GATE(PCLK_GPIO2, "pclk_gpio2", "pclk_pd_alive", 0, RK3368_CLKGATE_CON(22), 2, GFLAGS),
789+
GATE(PCLK_GPIO1, "pclk_gpio1", "pclk_pd_alive", 0, RK3368_CLKGATE_CON(22), 1, GFLAGS),
790790

791791
/*
792792
* pclk_vio gates
@@ -796,12 +796,12 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = {
796796
GATE(0, "pclk_dphytx", "hclk_vio", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(14), 8, GFLAGS),
797797

798798
/* pclk_pd_pmu gates */
799-
GATE(PCLK_PMUGRF, "pclk_pmugrf", "pclk_pd_pmu", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(17), 0, GFLAGS),
800-
GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_pd_pmu", 0, RK3368_CLKGATE_CON(17), 4, GFLAGS),
801-
GATE(PCLK_SGRF, "pclk_sgrf", "pclk_pd_pmu", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(17), 3, GFLAGS),
802-
GATE(0, "pclk_pmu_noc", "pclk_pd_pmu", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(17), 2, GFLAGS),
803-
GATE(0, "pclk_intmem1", "pclk_pd_pmu", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(17), 1, GFLAGS),
804-
GATE(PCLK_PMU, "pclk_pmu", "pclk_pd_pmu", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(17), 2, GFLAGS),
799+
GATE(PCLK_PMUGRF, "pclk_pmugrf", "pclk_pd_pmu", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(23), 5, GFLAGS),
800+
GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_pd_pmu", 0, RK3368_CLKGATE_CON(23), 4, GFLAGS),
801+
GATE(PCLK_SGRF, "pclk_sgrf", "pclk_pd_pmu", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(23), 3, GFLAGS),
802+
GATE(0, "pclk_pmu_noc", "pclk_pd_pmu", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(23), 2, GFLAGS),
803+
GATE(0, "pclk_intmem1", "pclk_pd_pmu", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(23), 1, GFLAGS),
804+
GATE(PCLK_PMU, "pclk_pmu", "pclk_pd_pmu", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(23), 0, GFLAGS),
805805

806806
/* timer gates */
807807
GATE(0, "sclk_timer15", "xin24m", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(24), 11, GFLAGS),

‎drivers/clk/tegra/clk-emc.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -450,8 +450,10 @@ static int load_timings_from_dt(struct tegra_clk_emc *tegra,
450450
struct emc_timing *timing = tegra->timings + (i++);
451451

452452
err = load_one_timing_from_dt(tegra, timing, child);
453-
if (err)
453+
if (err) {
454+
of_node_put(child);
454455
return err;
456+
}
455457

456458
timing->ram_code = ram_code;
457459
}
@@ -499,9 +501,9 @@ struct clk *tegra_clk_register_emc(void __iomem *base, struct device_node *np,
499501
* fuses until the apbmisc driver is loaded.
500502
*/
501503
err = load_timings_from_dt(tegra, node, node_ram_code);
504+
of_node_put(node);
502505
if (err)
503506
return ERR_PTR(err);
504-
of_node_put(node);
505507
break;
506508
}
507509

‎drivers/clk/tegra/clk-id.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,7 @@ enum clk_id {
1111
tegra_clk_afi,
1212
tegra_clk_amx,
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tegra_clk_amx1,
14+
tegra_clk_apb2ape,
1415
tegra_clk_apbdma,
1516
tegra_clk_apbif,
1617
tegra_clk_ape,

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