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Kumaravel Thiagarajangregkh
Kumaravel Thiagarajan
authored and
gregkh
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misc: microchip: pci1xxxx: load auxiliary bus driver for the PIO function in the multi-function endpoint of pci1xxxx device.
pci1xxxx is a PCIe switch with a multi-function endpoint on one of its downstream ports. PIO function is one of the functions in the multi-function endpoint. PIO function combines a GPIO controller and also an interface to program pci1xxxx's OTP & EEPROM. This auxiliary bus driver is loaded for the PIO function and separate child devices are enumerated for GPIO controller and OTP/EEPROM interface. Signed-off-by: Kumaravel Thiagarajan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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‎MAINTAINERS

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@@ -13422,6 +13422,13 @@ S: Supported
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F: Documentation/devicetree/bindings/mtd/atmel-nand.txt
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F: drivers/mtd/nand/raw/atmel/*
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MICROCHIP PCI1XXXX GP DRIVER
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M: Kumaravel Thiagarajan <[email protected]>
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L: [email protected]
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S: Supported
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F: drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gp.c
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F: drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gp.h
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MICROCHIP OTPC DRIVER
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M: Claudiu Beznea <[email protected]>
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L: [email protected] (moderated for non-subscribers)

‎drivers/misc/Kconfig

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@@ -513,4 +513,5 @@ source "drivers/misc/cardreader/Kconfig"
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source "drivers/misc/habanalabs/Kconfig"
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source "drivers/misc/uacce/Kconfig"
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source "drivers/misc/pvpanic/Kconfig"
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source "drivers/misc/mchp_pci1xxxx/Kconfig"
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endmenu

‎drivers/misc/Makefile

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@@ -60,4 +60,5 @@ obj-$(CONFIG_XILINX_SDFEC) += xilinx_sdfec.o
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obj-$(CONFIG_HISI_HIKEY_USB) += hisi_hikey_usb.o
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obj-$(CONFIG_HI6421V600_IRQ) += hi6421v600-irq.o
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obj-$(CONFIG_OPEN_DICE) += open-dice.o
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obj-$(CONFIG_VCPU_STALL_DETECTOR) += vcpu_stall_detector.o
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obj-$(CONFIG_GP_PCI1XXXX) += mchp_pci1xxxx/
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obj-$(CONFIG_VCPU_STALL_DETECTOR) += vcpu_stall_detector.o

‎drivers/misc/mchp_pci1xxxx/Kconfig

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config GP_PCI1XXXX
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tristate "Microchip PCI1XXXX PCIe to GPIO Expander + OTP/EEPROM manager"
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depends on PCI
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select GPIOLIB_IRQCHIP
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help
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PCI1XXXX is a PCIe GEN 3 switch with one of the endpoints having
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multiple functions and one of the functions is a GPIO controller
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which also has registers to interface with the OTP and EEPROM.
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Select yes, no or module here to include or exclude the driver
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for the GPIO function.
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‎drivers/misc/mchp_pci1xxxx/Makefile

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obj-$(CONFIG_GP_PCI1XXXX) := mchp_pci1xxxx_gp.o

‎drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gp.c

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// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2022 Microchip Technology Inc.
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#include <linux/mfd/core.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/spinlock.h>
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#include <linux/gpio/driver.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/idr.h>
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#include "mchp_pci1xxxx_gp.h"
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struct aux_bus_device {
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struct auxiliary_device_wrapper *aux_device_wrapper[2];
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};
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static DEFINE_IDA(gp_client_ida);
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static const char aux_dev_otp_e2p_name[15] = "gp_otp_e2p";
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static const char aux_dev_gpio_name[15] = "gp_gpio";
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static void gp_auxiliary_device_release(struct device *dev)
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{
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struct auxiliary_device_wrapper *aux_device_wrapper =
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(struct auxiliary_device_wrapper *)container_of(dev,
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struct auxiliary_device_wrapper, aux_dev.dev);
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ida_free(&gp_client_ida, aux_device_wrapper->aux_dev.id);
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kfree(aux_device_wrapper);
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}
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static int gp_aux_bus_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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{
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struct aux_bus_device *aux_bus;
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int retval;
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retval = pcim_enable_device(pdev);
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if (retval)
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return retval;
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aux_bus = kzalloc(sizeof(*aux_bus), GFP_KERNEL);
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if (!aux_bus)
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return -ENOMEM;
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aux_bus->aux_device_wrapper[0] = kzalloc(sizeof(*aux_bus->aux_device_wrapper[0]),
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GFP_KERNEL);
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if (!aux_bus->aux_device_wrapper[0])
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return -ENOMEM;
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retval = ida_alloc(&gp_client_ida, GFP_KERNEL);
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if (retval < 0)
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goto err_ida_alloc_0;
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aux_bus->aux_device_wrapper[0]->aux_dev.name = aux_dev_otp_e2p_name;
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aux_bus->aux_device_wrapper[0]->aux_dev.dev.parent = &pdev->dev;
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aux_bus->aux_device_wrapper[0]->aux_dev.dev.release = gp_auxiliary_device_release;
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aux_bus->aux_device_wrapper[0]->aux_dev.id = retval;
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aux_bus->aux_device_wrapper[0]->gp_aux_data.region_start = pci_resource_start(pdev, 0);
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aux_bus->aux_device_wrapper[0]->gp_aux_data.region_length = pci_resource_end(pdev, 0);
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retval = auxiliary_device_init(&aux_bus->aux_device_wrapper[0]->aux_dev);
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if (retval < 0)
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goto err_aux_dev_init_0;
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retval = auxiliary_device_add(&aux_bus->aux_device_wrapper[0]->aux_dev);
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if (retval)
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goto err_aux_dev_add_0;
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aux_bus->aux_device_wrapper[1] = kzalloc(sizeof(*aux_bus->aux_device_wrapper[1]),
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GFP_KERNEL);
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if (!aux_bus->aux_device_wrapper[1])
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return -ENOMEM;
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retval = ida_alloc(&gp_client_ida, GFP_KERNEL);
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if (retval < 0)
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goto err_ida_alloc_1;
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aux_bus->aux_device_wrapper[1]->aux_dev.name = aux_dev_gpio_name;
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aux_bus->aux_device_wrapper[1]->aux_dev.dev.parent = &pdev->dev;
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aux_bus->aux_device_wrapper[1]->aux_dev.dev.release = gp_auxiliary_device_release;
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aux_bus->aux_device_wrapper[1]->aux_dev.id = retval;
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aux_bus->aux_device_wrapper[1]->gp_aux_data.region_start = pci_resource_start(pdev, 0);
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aux_bus->aux_device_wrapper[1]->gp_aux_data.region_length = pci_resource_end(pdev, 0);
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retval = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
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if (retval < 0)
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return retval;
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pdev->irq = pci_irq_vector(pdev, 0);
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if (pdev->irq < 0)
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return retval;
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aux_bus->aux_device_wrapper[1]->gp_aux_data.irq_num = pdev->irq;
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retval = auxiliary_device_init(&aux_bus->aux_device_wrapper[1]->aux_dev);
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if (retval < 0)
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goto err_aux_dev_init_1;
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retval = auxiliary_device_add(&aux_bus->aux_device_wrapper[1]->aux_dev);
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if (retval)
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goto err_aux_dev_add_1;
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pci_set_drvdata(pdev, aux_bus);
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pci_set_master(pdev);
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return 0;
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err_aux_dev_add_1:
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auxiliary_device_uninit(&aux_bus->aux_device_wrapper[1]->aux_dev);
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err_aux_dev_init_1:
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ida_free(&gp_client_ida, aux_bus->aux_device_wrapper[1]->aux_dev.id);
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err_ida_alloc_1:
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kfree(aux_bus->aux_device_wrapper[1]);
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err_aux_dev_add_0:
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auxiliary_device_uninit(&aux_bus->aux_device_wrapper[0]->aux_dev);
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err_aux_dev_init_0:
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ida_free(&gp_client_ida, aux_bus->aux_device_wrapper[0]->aux_dev.id);
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err_ida_alloc_0:
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kfree(aux_bus->aux_device_wrapper[0]);
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return retval;
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}
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static void gp_aux_bus_remove(struct pci_dev *pdev)
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{
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struct aux_bus_device *aux_bus = pci_get_drvdata(pdev);
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auxiliary_device_delete(&aux_bus->aux_device_wrapper[0]->aux_dev);
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auxiliary_device_uninit(&aux_bus->aux_device_wrapper[0]->aux_dev);
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auxiliary_device_delete(&aux_bus->aux_device_wrapper[1]->aux_dev);
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auxiliary_device_uninit(&aux_bus->aux_device_wrapper[1]->aux_dev);
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kfree(aux_bus);
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pci_disable_device(pdev);
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}
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static const struct pci_device_id pci1xxxx_tbl[] = {
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{ PCI_DEVICE(0x1055, 0xA005) },
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{ PCI_DEVICE(0x1055, 0xA015) },
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{ PCI_DEVICE(0x1055, 0xA025) },
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{ PCI_DEVICE(0x1055, 0xA035) },
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{ PCI_DEVICE(0x1055, 0xA045) },
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{ PCI_DEVICE(0x1055, 0xA055) },
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{0,}
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};
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MODULE_DEVICE_TABLE(pci, pci1xxxx_tbl);
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static struct pci_driver pci1xxxx_gp_driver = {
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.name = "PCI1xxxxGP",
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.id_table = pci1xxxx_tbl,
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.probe = gp_aux_bus_probe,
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.remove = gp_aux_bus_remove,
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};
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module_pci_driver(pci1xxxx_gp_driver);
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MODULE_DESCRIPTION("Microchip Technology Inc. PCI1xxxx GP expander");
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MODULE_AUTHOR("Kumaravel Thiagarajan <[email protected]>");
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MODULE_LICENSE("GPL");

‎drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gp.h

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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (C) 2022 Microchip Technology Inc. */
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#ifndef _GPIO_PCI1XXXX_H
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#define _GPIO_PCI1XXXX_H
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#include <linux/spinlock.h>
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#include <linux/mutex.h>
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#include <linux/kthread.h>
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#include <linux/types.h>
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#include <linux/auxiliary_bus.h>
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/* Perform operations like variable length write, read and write with read back for OTP / EEPROM
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* Perform bit mode write in OTP
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*/
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struct gp_aux_data_type {
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int irq_num;
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resource_size_t region_start;
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resource_size_t region_length;
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};
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struct auxiliary_device_wrapper {
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struct auxiliary_device aux_dev;
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struct gp_aux_data_type gp_aux_data;
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};
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#endif

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