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Commit 39c960b

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Nikita Zhandarovichalexdeucher
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drm/radeon/r600_cs: Fix possible int overflows in r600_cs_check_reg()
While improbable, there may be a chance of hitting integer overflow when the result of radeon_get_ib_value() gets shifted left. Avoid it by casting one of the operands to larger data type (u64). Found by Linux Verification Center (linuxtesting.org) with static analysis tool SVACE. Fixes: 1729dd3 ("drm/radeon/kms: r600 CS parser fixes") Signed-off-by: Nikita Zhandarovich <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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drivers/gpu/drm/radeon/r600_cs.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1275,7 +1275,7 @@ static int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx)
12751275
return -EINVAL;
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}
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tmp = (reg - CB_COLOR0_BASE) / 4;
1278-
track->cb_color_bo_offset[tmp] = radeon_get_ib_value(p, idx) << 8;
1278+
track->cb_color_bo_offset[tmp] = (u64)radeon_get_ib_value(p, idx) << 8;
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ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff);
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track->cb_color_base_last[tmp] = ib[idx];
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track->cb_color_bo[tmp] = reloc->robj;
@@ -1302,7 +1302,7 @@ static int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx)
13021302
"0x%04X\n", reg);
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return -EINVAL;
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}
1305-
track->htile_offset = radeon_get_ib_value(p, idx) << 8;
1305+
track->htile_offset = (u64)radeon_get_ib_value(p, idx) << 8;
13061306
ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff);
13071307
track->htile_bo = reloc->robj;
13081308
track->db_dirty = true;

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