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dceraolo
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ickle
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drm/i915: use intel_uncore for all forcewake get/put
Now that the internal code all works on intel_uncore, flip the external-facing interface. v2: fix GVT. Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: Paulo Zanoni <[email protected]> Reviewed-by: Paulo Zanoni <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
1 parent f568eee commit 3ceea6a

17 files changed

+107
-115
lines changed

‎drivers/gpu/drm/i915/gvt/mmio_context.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -356,7 +356,7 @@ static void handle_tlb_pending_event(struct intel_vgpu *vgpu, int ring_id)
356356
if (ring_id == RCS0 && INTEL_GEN(dev_priv) >= 9)
357357
fw |= FORCEWAKE_RENDER;
358358

359-
intel_uncore_forcewake_get(dev_priv, fw);
359+
intel_uncore_forcewake_get(&dev_priv->uncore, fw);
360360

361361
I915_WRITE_FW(reg, 0x1);
362362

@@ -365,7 +365,7 @@ static void handle_tlb_pending_event(struct intel_vgpu *vgpu, int ring_id)
365365
else
366366
vgpu_vreg_t(vgpu, reg) = 0;
367367

368-
intel_uncore_forcewake_put(dev_priv, fw);
368+
intel_uncore_forcewake_put(&dev_priv->uncore, fw);
369369

370370
gvt_dbg_core("invalidate TLB for ring %d\n", ring_id);
371371
}
@@ -552,9 +552,9 @@ void intel_gvt_switch_mmio(struct intel_vgpu *pre,
552552
* performace for batch mmio read/write, so we need
553553
* handle forcewake mannually.
554554
*/
555-
intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
555+
intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);
556556
switch_mmio(pre, next, ring_id);
557-
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
557+
intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
558558
}
559559

560560
/**

‎drivers/gpu/drm/i915/gvt/scheduler.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -988,7 +988,7 @@ static int workload_thread(void *priv)
988988
workload->ring_id, workload);
989989

990990
if (need_force_wake)
991-
intel_uncore_forcewake_get(gvt->dev_priv,
991+
intel_uncore_forcewake_get(&gvt->dev_priv->uncore,
992992
FORCEWAKE_ALL);
993993

994994
ret = dispatch_workload(workload);
@@ -1010,7 +1010,7 @@ static int workload_thread(void *priv)
10101010
complete_current_workload(gvt, ring_id);
10111011

10121012
if (need_force_wake)
1013-
intel_uncore_forcewake_put(gvt->dev_priv,
1013+
intel_uncore_forcewake_put(&gvt->dev_priv->uncore,
10141014
FORCEWAKE_ALL);
10151015

10161016
intel_runtime_pm_put_unchecked(gvt->dev_priv);

‎drivers/gpu/drm/i915/i915_debugfs.c

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1094,7 +1094,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
10941094
}
10951095

10961096
/* RPSTAT1 is in the GT power well */
1097-
intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
1097+
intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);
10981098

10991099
reqf = I915_READ(GEN6_RPNSWREQ);
11001100
if (INTEL_GEN(dev_priv) >= 9)
@@ -1122,7 +1122,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
11221122
cagf = intel_gpu_freq(dev_priv,
11231123
intel_get_cagf(dev_priv, rpstat));
11241124

1125-
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
1125+
intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
11261126

11271127
if (INTEL_GEN(dev_priv) >= 11) {
11281128
pm_ier = I915_READ(GEN11_GPM_WGBOXPERF_INTR_ENABLE);
@@ -2060,12 +2060,12 @@ static int i915_rps_boost_info(struct seq_file *m, void *data)
20602060
u32 rpup, rpupei;
20612061
u32 rpdown, rpdownei;
20622062

2063-
intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
2063+
intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);
20642064
rpup = I915_READ_FW(GEN6_RP_CUR_UP) & GEN6_RP_EI_MASK;
20652065
rpupei = I915_READ_FW(GEN6_RP_CUR_UP_EI) & GEN6_RP_EI_MASK;
20662066
rpdown = I915_READ_FW(GEN6_RP_CUR_DOWN) & GEN6_RP_EI_MASK;
20672067
rpdownei = I915_READ_FW(GEN6_RP_CUR_DOWN_EI) & GEN6_RP_EI_MASK;
2068-
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
2068+
intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
20692069

20702070
seq_printf(m, "\nRPS Autotuning (current \"%s\" window):\n",
20712071
rps_power_to_str(rps->power.mode));
@@ -4251,7 +4251,7 @@ static int i915_forcewake_open(struct inode *inode, struct file *file)
42514251
return 0;
42524252

42534253
file->private_data = (void *)(uintptr_t)intel_runtime_pm_get(i915);
4254-
intel_uncore_forcewake_user_get(i915);
4254+
intel_uncore_forcewake_user_get(&i915->uncore);
42554255

42564256
return 0;
42574257
}
@@ -4263,7 +4263,7 @@ static int i915_forcewake_release(struct inode *inode, struct file *file)
42634263
if (INTEL_GEN(i915) < 6)
42644264
return 0;
42654265

4266-
intel_uncore_forcewake_user_put(i915);
4266+
intel_uncore_forcewake_user_put(&i915->uncore);
42674267
intel_runtime_pm_put(i915,
42684268
(intel_wakeref_t)(uintptr_t)file->private_data);
42694269

‎drivers/gpu/drm/i915/i915_gem.c

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -4318,7 +4318,7 @@ void i915_gem_sanitize(struct drm_i915_private *i915)
43184318
GEM_TRACE("\n");
43194319

43204320
wakeref = intel_runtime_pm_get(i915);
4321-
intel_uncore_forcewake_get(i915, FORCEWAKE_ALL);
4321+
intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL);
43224322

43234323
/*
43244324
* As we have just resumed the machine and woken the device up from
@@ -4339,7 +4339,7 @@ void i915_gem_sanitize(struct drm_i915_private *i915)
43394339
*/
43404340
intel_engines_sanitize(i915, false);
43414341

4342-
intel_uncore_forcewake_put(i915, FORCEWAKE_ALL);
4342+
intel_uncore_forcewake_put(&i915->uncore, FORCEWAKE_ALL);
43434343
intel_runtime_pm_put(i915, wakeref);
43444344

43454345
mutex_lock(&i915->drm.struct_mutex);
@@ -4438,7 +4438,7 @@ void i915_gem_resume(struct drm_i915_private *i915)
44384438
WARN_ON(i915->gt.awake);
44394439

44404440
mutex_lock(&i915->drm.struct_mutex);
4441-
intel_uncore_forcewake_get(i915, FORCEWAKE_ALL);
4441+
intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL);
44424442

44434443
i915_gem_restore_gtt_mappings(i915);
44444444
i915_gem_restore_fences(i915);
@@ -4460,7 +4460,7 @@ void i915_gem_resume(struct drm_i915_private *i915)
44604460
goto err_wedged;
44614461

44624462
out_unlock:
4463-
intel_uncore_forcewake_put(i915, FORCEWAKE_ALL);
4463+
intel_uncore_forcewake_put(&i915->uncore, FORCEWAKE_ALL);
44644464
mutex_unlock(&i915->drm.struct_mutex);
44654465
return;
44664466

@@ -4549,7 +4549,7 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
45494549
dev_priv->gt.last_init_time = ktime_get();
45504550

45514551
/* Double layer security blanket, see i915_gem_init() */
4552-
intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
4552+
intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);
45534553

45544554
if (HAS_EDRAM(dev_priv) && INTEL_GEN(dev_priv) < 9)
45554555
I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
@@ -4604,14 +4604,14 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
46044604
if (ret)
46054605
goto cleanup_uc;
46064606

4607-
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
4607+
intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
46084608

46094609
return 0;
46104610

46114611
cleanup_uc:
46124612
intel_uc_fini_hw(dev_priv);
46134613
out:
4614-
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
4614+
intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
46154615

46164616
return ret;
46174617
}
@@ -4815,7 +4815,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
48154815
* just magically go away.
48164816
*/
48174817
mutex_lock(&dev_priv->drm.struct_mutex);
4818-
intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
4818+
intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);
48194819

48204820
ret = i915_gem_init_ggtt(dev_priv);
48214821
if (ret) {
@@ -4877,7 +4877,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
48774877
goto err_init_hw;
48784878
}
48794879

4880-
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
4880+
intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
48814881
mutex_unlock(&dev_priv->drm.struct_mutex);
48824882

48834883
return 0;
@@ -4912,7 +4912,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
49124912
i915_gem_fini_scratch(dev_priv);
49134913
err_ggtt:
49144914
err_unlock:
4915-
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
4915+
intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
49164916
mutex_unlock(&dev_priv->drm.struct_mutex);
49174917

49184918
err_uc_misc:

‎drivers/gpu/drm/i915/i915_perf.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1364,7 +1364,7 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
13641364

13651365
free_oa_buffer(dev_priv);
13661366

1367-
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
1367+
intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
13681368
intel_runtime_pm_put(dev_priv, stream->wakeref);
13691369

13701370
if (stream->ctx)
@@ -2093,7 +2093,7 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream,
20932093
* references will effectively disable RC6.
20942094
*/
20952095
stream->wakeref = intel_runtime_pm_get(dev_priv);
2096-
intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
2096+
intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);
20972097

20982098
ret = alloc_oa_buffer(dev_priv);
20992099
if (ret)
@@ -2127,7 +2127,7 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream,
21272127
err_oa_buf_alloc:
21282128
put_oa_config(dev_priv, stream->oa_config);
21292129

2130-
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
2130+
intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
21312131
intel_runtime_pm_put(dev_priv, stream->wakeref);
21322132

21332133
err_config:

‎drivers/gpu/drm/i915/i915_reset.c

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -569,7 +569,7 @@ int intel_gpu_reset(struct drm_i915_private *i915, unsigned int engine_mask)
569569
* If the power well sleeps during the reset, the reset
570570
* request may be dropped and never completes (causing -EIO).
571571
*/
572-
intel_uncore_forcewake_get(i915, FORCEWAKE_ALL);
572+
intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL);
573573
for (retry = 0; ret == -ETIMEDOUT && retry < retries; retry++) {
574574
/*
575575
* We stop engines, otherwise we might get failed reset and a
@@ -593,7 +593,7 @@ int intel_gpu_reset(struct drm_i915_private *i915, unsigned int engine_mask)
593593
ret = reset(i915, engine_mask, retry);
594594
preempt_enable();
595595
}
596-
intel_uncore_forcewake_put(i915, FORCEWAKE_ALL);
596+
intel_uncore_forcewake_put(&i915->uncore, FORCEWAKE_ALL);
597597

598598
return ret;
599599
}
@@ -622,9 +622,9 @@ int intel_reset_guc(struct drm_i915_private *i915)
622622

623623
GEM_BUG_ON(!HAS_GUC(i915));
624624

625-
intel_uncore_forcewake_get(i915, FORCEWAKE_ALL);
625+
intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL);
626626
ret = gen6_hw_domain_reset(i915, guc_domain);
627-
intel_uncore_forcewake_put(i915, FORCEWAKE_ALL);
627+
intel_uncore_forcewake_put(&i915->uncore, FORCEWAKE_ALL);
628628

629629
return ret;
630630
}
@@ -642,7 +642,7 @@ static void reset_prepare_engine(struct intel_engine_cs *engine)
642642
* written to the powercontext is undefined and so we may lose
643643
* GPU state upon resume, i.e. fail to restart after a reset.
644644
*/
645-
intel_uncore_forcewake_get(engine->i915, FORCEWAKE_ALL);
645+
intel_uncore_forcewake_get(&engine->i915->uncore, FORCEWAKE_ALL);
646646
engine->reset.prepare(engine);
647647
}
648648

@@ -713,7 +713,7 @@ static int gt_reset(struct drm_i915_private *i915, unsigned int stalled_mask)
713713
static void reset_finish_engine(struct intel_engine_cs *engine)
714714
{
715715
engine->reset.finish(engine);
716-
intel_uncore_forcewake_put(engine->i915, FORCEWAKE_ALL);
716+
intel_uncore_forcewake_put(&engine->i915->uncore, FORCEWAKE_ALL);
717717
}
718718

719719
struct i915_gpu_restart {

‎drivers/gpu/drm/i915/intel_display.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9519,7 +9519,7 @@ static void hsw_restore_lcpll(struct drm_i915_private *dev_priv)
95199519
* Make sure we're not on PC8 state before disabling PC8, otherwise
95209520
* we'll hang the machine. To prevent PC8 state, just enable force_wake.
95219521
*/
9522-
intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
9522+
intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);
95239523

95249524
if (val & LCPLL_POWER_DOWN_ALLOW) {
95259525
val &= ~LCPLL_POWER_DOWN_ALLOW;
@@ -9551,7 +9551,7 @@ static void hsw_restore_lcpll(struct drm_i915_private *dev_priv)
95519551
DRM_ERROR("Switching back to LCPLL failed\n");
95529552
}
95539553

9554-
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
9554+
intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
95559555

95569556
intel_update_cdclk(dev_priv);
95579557
intel_dump_cdclk_state(&dev_priv->cdclk.hw, "Current CDCLK");

‎drivers/gpu/drm/i915/intel_engine_cs.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -919,7 +919,7 @@ read_subslice_reg(struct drm_i915_private *dev_priv, int slice,
919919
FW_REG_READ | FW_REG_WRITE);
920920

921921
spin_lock_irq(&dev_priv->uncore.lock);
922-
intel_uncore_forcewake_get__locked(dev_priv, fw_domains);
922+
intel_uncore_forcewake_get__locked(&dev_priv->uncore, fw_domains);
923923

924924
mcr = I915_READ_FW(GEN8_MCR_SELECTOR);
925925

@@ -937,7 +937,7 @@ read_subslice_reg(struct drm_i915_private *dev_priv, int slice,
937937

938938
I915_WRITE_FW(GEN8_MCR_SELECTOR, mcr);
939939

940-
intel_uncore_forcewake_put__locked(dev_priv, fw_domains);
940+
intel_uncore_forcewake_put__locked(&dev_priv->uncore, fw_domains);
941941
spin_unlock_irq(&dev_priv->uncore.lock);
942942

943943
return ret;

‎drivers/gpu/drm/i915/intel_guc.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -369,14 +369,14 @@ void intel_guc_init_params(struct intel_guc *guc)
369369
* they are power context saved so it's ok to release forcewake
370370
* when we are done here and take it again at xfer time.
371371
*/
372-
intel_uncore_forcewake_get(dev_priv, FORCEWAKE_BLITTER);
372+
intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_BLITTER);
373373

374374
I915_WRITE(SOFT_SCRATCH(0), 0);
375375

376376
for (i = 0; i < GUC_CTL_MAX_DWORDS; i++)
377377
I915_WRITE(SOFT_SCRATCH(1 + i), params[i]);
378378

379-
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_BLITTER);
379+
intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_BLITTER);
380380
}
381381

382382
int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len,
@@ -414,7 +414,7 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len,
414414
*action != INTEL_GUC_ACTION_DEREGISTER_COMMAND_TRANSPORT_BUFFER);
415415

416416
mutex_lock(&guc->send_mutex);
417-
intel_uncore_forcewake_get(dev_priv, guc->send_regs.fw_domains);
417+
intel_uncore_forcewake_get(&dev_priv->uncore, guc->send_regs.fw_domains);
418418

419419
for (i = 0; i < len; i++)
420420
I915_WRITE(guc_send_reg(guc, i), action[i]);
@@ -454,7 +454,7 @@ int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len,
454454
ret = INTEL_GUC_MSG_TO_DATA(status);
455455

456456
out:
457-
intel_uncore_forcewake_put(dev_priv, guc->send_regs.fw_domains);
457+
intel_uncore_forcewake_put(&dev_priv->uncore, guc->send_regs.fw_domains);
458458
mutex_unlock(&guc->send_mutex);
459459

460460
return ret;

‎drivers/gpu/drm/i915/intel_guc_fw.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -241,7 +241,7 @@ static int guc_fw_xfer(struct intel_uc_fw *guc_fw, struct i915_vma *vma)
241241

242242
GEM_BUG_ON(guc_fw->type != INTEL_UC_FW_TYPE_GUC);
243243

244-
intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
244+
intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);
245245

246246
guc_prepare_xfer(guc);
247247

@@ -254,7 +254,7 @@ static int guc_fw_xfer(struct intel_uc_fw *guc_fw, struct i915_vma *vma)
254254

255255
ret = guc_xfer_ucode(guc, vma);
256256

257-
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
257+
intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
258258

259259
return ret;
260260
}

‎drivers/gpu/drm/i915/intel_huc_fw.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -112,7 +112,7 @@ static int huc_fw_xfer(struct intel_uc_fw *huc_fw, struct i915_vma *vma)
112112

113113
GEM_BUG_ON(huc_fw->type != INTEL_UC_FW_TYPE_HUC);
114114

115-
intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
115+
intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);
116116

117117
/* Set the source address for the uCode */
118118
offset = intel_guc_ggtt_offset(&dev_priv->guc, vma) +
@@ -140,7 +140,7 @@ static int huc_fw_xfer(struct intel_uc_fw *huc_fw, struct i915_vma *vma)
140140
/* Disable the bits once DMA is over */
141141
I915_WRITE(DMA_CTRL, _MASKED_BIT_DISABLE(HUC_UKERNEL));
142142

143-
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
143+
intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
144144

145145
return ret;
146146
}

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