Skip to content

Commit 41a1d04

Browse files
jbrandebJeff Kirsher
jbrandeb
authored and
Jeff Kirsher
committed
i40e: use BIT and BIT_ULL macros
Use macros for abstracting (1 << foo) to BIT(foo) and (1ULL << foo64) to BIT_ULL(foo64) in order to match better with kernel requirements. NOTE: the adminq_cmd.h file was not modified on purpose because of the dependency upon firmware for that file. Change-ID: I73ee2e48c880d671948aad19bd53ca6b2ac558fc Signed-off-by: Jesse Brandeburg <[email protected]> Signed-off-by: Catherine Sullivan <[email protected]> Tested-by: Jim Young <[email protected]> Signed-off-by: Jeff Kirsher <[email protected]>
1 parent f1c7e72 commit 41a1d04

26 files changed

+293
-304
lines changed

‎drivers/net/ethernet/intel/i40e/i40e.h

Lines changed: 28 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -98,7 +98,7 @@
9898
#define I40E_INT_NAME_STR_LEN (IFNAMSIZ + 9)
9999

100100
/* Ethtool Private Flags */
101-
#define I40E_PRIV_FLAGS_NPAR_FLAG (1 << 0)
101+
#define I40E_PRIV_FLAGS_NPAR_FLAG BIT(0)
102102

103103
#define I40E_NVM_VERSION_LO_SHIFT 0
104104
#define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
@@ -289,35 +289,35 @@ struct i40e_pf {
289289
struct work_struct service_task;
290290

291291
u64 flags;
292-
#define I40E_FLAG_RX_CSUM_ENABLED (u64)(1 << 1)
293-
#define I40E_FLAG_MSI_ENABLED (u64)(1 << 2)
294-
#define I40E_FLAG_MSIX_ENABLED (u64)(1 << 3)
295-
#define I40E_FLAG_RX_1BUF_ENABLED (u64)(1 << 4)
296-
#define I40E_FLAG_RX_PS_ENABLED (u64)(1 << 5)
297-
#define I40E_FLAG_RSS_ENABLED (u64)(1 << 6)
298-
#define I40E_FLAG_VMDQ_ENABLED (u64)(1 << 7)
299-
#define I40E_FLAG_FDIR_REQUIRES_REINIT (u64)(1 << 8)
300-
#define I40E_FLAG_NEED_LINK_UPDATE (u64)(1 << 9)
292+
#define I40E_FLAG_RX_CSUM_ENABLED BIT_ULL(1)
293+
#define I40E_FLAG_MSI_ENABLED BIT_ULL(2)
294+
#define I40E_FLAG_MSIX_ENABLED BIT_ULL(3)
295+
#define I40E_FLAG_RX_1BUF_ENABLED BIT_ULL(4)
296+
#define I40E_FLAG_RX_PS_ENABLED BIT_ULL(5)
297+
#define I40E_FLAG_RSS_ENABLED BIT_ULL(6)
298+
#define I40E_FLAG_VMDQ_ENABLED BIT_ULL(7)
299+
#define I40E_FLAG_FDIR_REQUIRES_REINIT BIT_ULL(8)
300+
#define I40E_FLAG_NEED_LINK_UPDATE BIT_ULL(9)
301301
#ifdef I40E_FCOE
302-
#define I40E_FLAG_FCOE_ENABLED (u64)(1 << 11)
302+
#define I40E_FLAG_FCOE_ENABLED BIT_ULL(11)
303303
#endif /* I40E_FCOE */
304-
#define I40E_FLAG_IN_NETPOLL (u64)(1 << 12)
305-
#define I40E_FLAG_16BYTE_RX_DESC_ENABLED (u64)(1 << 13)
306-
#define I40E_FLAG_CLEAN_ADMINQ (u64)(1 << 14)
307-
#define I40E_FLAG_FILTER_SYNC (u64)(1 << 15)
308-
#define I40E_FLAG_PROCESS_MDD_EVENT (u64)(1 << 17)
309-
#define I40E_FLAG_PROCESS_VFLR_EVENT (u64)(1 << 18)
310-
#define I40E_FLAG_SRIOV_ENABLED (u64)(1 << 19)
311-
#define I40E_FLAG_DCB_ENABLED (u64)(1 << 20)
312-
#define I40E_FLAG_FD_SB_ENABLED (u64)(1 << 21)
313-
#define I40E_FLAG_FD_ATR_ENABLED (u64)(1 << 22)
314-
#define I40E_FLAG_PTP (u64)(1 << 25)
315-
#define I40E_FLAG_MFP_ENABLED (u64)(1 << 26)
304+
#define I40E_FLAG_IN_NETPOLL BIT_ULL(12)
305+
#define I40E_FLAG_16BYTE_RX_DESC_ENABLED BIT_ULL(13)
306+
#define I40E_FLAG_CLEAN_ADMINQ BIT_ULL(14)
307+
#define I40E_FLAG_FILTER_SYNC BIT_ULL(15)
308+
#define I40E_FLAG_PROCESS_MDD_EVENT BIT_ULL(17)
309+
#define I40E_FLAG_PROCESS_VFLR_EVENT BIT_ULL(18)
310+
#define I40E_FLAG_SRIOV_ENABLED BIT_ULL(19)
311+
#define I40E_FLAG_DCB_ENABLED BIT_ULL(20)
312+
#define I40E_FLAG_FD_SB_ENABLED BIT_ULL(21)
313+
#define I40E_FLAG_FD_ATR_ENABLED BIT_ULL(22)
314+
#define I40E_FLAG_PTP BIT_ULL(25)
315+
#define I40E_FLAG_MFP_ENABLED BIT_ULL(26)
316316
#ifdef CONFIG_I40E_VXLAN
317-
#define I40E_FLAG_VXLAN_FILTER_SYNC (u64)(1 << 27)
317+
#define I40E_FLAG_VXLAN_FILTER_SYNC BIT_ULL(27)
318318
#endif
319-
#define I40E_FLAG_PORT_ID_VALID (u64)(1 << 28)
320-
#define I40E_FLAG_DCB_CAPABLE (u64)(1 << 29)
319+
#define I40E_FLAG_PORT_ID_VALID BIT_ULL(28)
320+
#define I40E_FLAG_DCB_CAPABLE BIT_ULL(29)
321321
#define I40E_FLAG_VEB_MODE_ENABLED BIT_ULL(40)
322322

323323
/* tracks features that get auto disabled by errors */
@@ -443,8 +443,8 @@ struct i40e_vsi {
443443

444444
u32 current_netdev_flags;
445445
unsigned long state;
446-
#define I40E_VSI_FLAG_FILTER_CHANGED (1<<0)
447-
#define I40E_VSI_FLAG_VEB_OWNER (1<<1)
446+
#define I40E_VSI_FLAG_FILTER_CHANGED BIT(0)
447+
#define I40E_VSI_FLAG_VEB_OWNER BIT(1)
448448
unsigned long flags;
449449

450450
struct list_head mac_filter_list;

‎drivers/net/ethernet/intel/i40e/i40e_common.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1393,9 +1393,9 @@ void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink)
13931393
blink = false;
13941394

13951395
if (blink)
1396-
gpio_val |= (1 << I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT);
1396+
gpio_val |= BIT(I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT);
13971397
else
1398-
gpio_val &= ~(1 << I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT);
1398+
gpio_val &= ~BIT(I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT);
13991399

14001400
wr32(hw, I40E_GLGEN_GPIO_CTL(i), gpio_val);
14011401
break;

‎drivers/net/ethernet/intel/i40e/i40e_dcb.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -58,9 +58,9 @@
5858
#define I40E_IEEE_ETS_MAXTC_SHIFT 0
5959
#define I40E_IEEE_ETS_MAXTC_MASK (0x7 << I40E_IEEE_ETS_MAXTC_SHIFT)
6060
#define I40E_IEEE_ETS_CBS_SHIFT 6
61-
#define I40E_IEEE_ETS_CBS_MASK (0x1 << I40E_IEEE_ETS_CBS_SHIFT)
61+
#define I40E_IEEE_ETS_CBS_MASK BIT(I40E_IEEE_ETS_CBS_SHIFT)
6262
#define I40E_IEEE_ETS_WILLING_SHIFT 7
63-
#define I40E_IEEE_ETS_WILLING_MASK (0x1 << I40E_IEEE_ETS_WILLING_SHIFT)
63+
#define I40E_IEEE_ETS_WILLING_MASK BIT(I40E_IEEE_ETS_WILLING_SHIFT)
6464
#define I40E_IEEE_ETS_PRIO_0_SHIFT 0
6565
#define I40E_IEEE_ETS_PRIO_0_MASK (0x7 << I40E_IEEE_ETS_PRIO_0_SHIFT)
6666
#define I40E_IEEE_ETS_PRIO_1_SHIFT 4
@@ -79,9 +79,9 @@
7979
#define I40E_IEEE_PFC_CAP_SHIFT 0
8080
#define I40E_IEEE_PFC_CAP_MASK (0xF << I40E_IEEE_PFC_CAP_SHIFT)
8181
#define I40E_IEEE_PFC_MBC_SHIFT 6
82-
#define I40E_IEEE_PFC_MBC_MASK (0x1 << I40E_IEEE_PFC_MBC_SHIFT)
82+
#define I40E_IEEE_PFC_MBC_MASK BIT(I40E_IEEE_PFC_MBC_SHIFT)
8383
#define I40E_IEEE_PFC_WILLING_SHIFT 7
84-
#define I40E_IEEE_PFC_WILLING_MASK (0x1 << I40E_IEEE_PFC_WILLING_SHIFT)
84+
#define I40E_IEEE_PFC_WILLING_MASK BIT(I40E_IEEE_PFC_WILLING_SHIFT)
8585

8686
/* Defines for IEEE APP TLV */
8787
#define I40E_IEEE_APP_SEL_SHIFT 0

‎drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -187,7 +187,7 @@ void i40e_dcbnl_set_all(struct i40e_vsi *vsi)
187187
/* Set up all the App TLVs if DCBx is negotiated */
188188
for (i = 0; i < dcbxcfg->numapps; i++) {
189189
prio = dcbxcfg->app[i].priority;
190-
tc_map = (1 << dcbxcfg->etscfg.prioritytable[prio]);
190+
tc_map = BIT(dcbxcfg->etscfg.prioritytable[prio]);
191191

192192
/* Add APP only if the TC is enabled for this VSI */
193193
if (tc_map & vsi->tc_config.enabled_tc) {

‎drivers/net/ethernet/intel/i40e/i40e_debugfs.c

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -964,7 +964,7 @@ static void i40e_dbg_cmd_fd_ctrl(struct i40e_pf *pf, u64 flag, bool enable)
964964
pf->auto_disable_flags |= flag;
965965
}
966966
dev_info(&pf->pdev->dev, "requesting a PF reset\n");
967-
i40e_do_reset_safe(pf, (1 << __I40E_PF_RESET_REQUESTED));
967+
i40e_do_reset_safe(pf, BIT(__I40E_PF_RESET_REQUESTED));
968968
}
969969

970970
#define I40E_MAX_DEBUG_OUT_BUFFER (4096*4)
@@ -1471,19 +1471,19 @@ static ssize_t i40e_dbg_command_write(struct file *filp,
14711471
}
14721472
} else if (strncmp(cmd_buf, "pfr", 3) == 0) {
14731473
dev_info(&pf->pdev->dev, "debugfs: forcing PFR\n");
1474-
i40e_do_reset_safe(pf, (1 << __I40E_PF_RESET_REQUESTED));
1474+
i40e_do_reset_safe(pf, BIT(__I40E_PF_RESET_REQUESTED));
14751475

14761476
} else if (strncmp(cmd_buf, "corer", 5) == 0) {
14771477
dev_info(&pf->pdev->dev, "debugfs: forcing CoreR\n");
1478-
i40e_do_reset_safe(pf, (1 << __I40E_CORE_RESET_REQUESTED));
1478+
i40e_do_reset_safe(pf, BIT(__I40E_CORE_RESET_REQUESTED));
14791479

14801480
} else if (strncmp(cmd_buf, "globr", 5) == 0) {
14811481
dev_info(&pf->pdev->dev, "debugfs: forcing GlobR\n");
1482-
i40e_do_reset_safe(pf, (1 << __I40E_GLOBAL_RESET_REQUESTED));
1482+
i40e_do_reset_safe(pf, BIT(__I40E_GLOBAL_RESET_REQUESTED));
14831483

14841484
} else if (strncmp(cmd_buf, "empr", 4) == 0) {
14851485
dev_info(&pf->pdev->dev, "debugfs: forcing EMPR\n");
1486-
i40e_do_reset_safe(pf, (1 << __I40E_EMP_RESET_REQUESTED));
1486+
i40e_do_reset_safe(pf, BIT(__I40E_EMP_RESET_REQUESTED));
14871487

14881488
} else if (strncmp(cmd_buf, "read", 4) == 0) {
14891489
u32 address;

‎drivers/net/ethernet/intel/i40e/i40e_diag.c

Lines changed: 4 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -144,11 +144,8 @@ i40e_status i40e_diag_eeprom_test(struct i40e_hw *hw)
144144
ret_code = i40e_read_nvm_word(hw, I40E_SR_NVM_CONTROL_WORD, &reg_val);
145145
if (!ret_code &&
146146
((reg_val & I40E_SR_CONTROL_WORD_1_MASK) ==
147-
(0x01 << I40E_SR_CONTROL_WORD_1_SHIFT))) {
148-
ret_code = i40e_validate_nvm_checksum(hw, NULL);
149-
} else {
150-
ret_code = I40E_ERR_DIAG_TEST_FAILED;
151-
}
152-
153-
return ret_code;
147+
BIT(I40E_SR_CONTROL_WORD_1_SHIFT)))
148+
return i40e_validate_nvm_checksum(hw, NULL);
149+
else
150+
return I40E_ERR_DIAG_TEST_FAILED;
154151
}

‎drivers/net/ethernet/intel/i40e/i40e_ethtool.c

Lines changed: 27 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -1017,7 +1017,7 @@ static int i40e_get_eeprom_len(struct net_device *netdev)
10171017
& I40E_GLPCI_LBARCTRL_FL_SIZE_MASK)
10181018
>> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT;
10191019
/* register returns value in power of 2, 64Kbyte chunks. */
1020-
val = (64 * 1024) * (1 << val);
1020+
val = (64 * 1024) * BIT(val);
10211021
return val;
10221022
}
10231023

@@ -1470,11 +1470,11 @@ static int i40e_get_ts_info(struct net_device *dev,
14701470
else
14711471
info->phc_index = -1;
14721472

1473-
info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
1473+
info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
14741474

1475-
info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
1476-
(1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
1477-
(1 << HWTSTAMP_FILTER_PTP_V2_EVENT);
1475+
info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1476+
BIT(HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
1477+
BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
14781478

14791479
return 0;
14801480
}
@@ -1590,7 +1590,7 @@ static void i40e_diag_test(struct net_device *netdev,
15901590
/* indicate we're in test mode */
15911591
dev_close(netdev);
15921592
else
1593-
i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
1593+
i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED));
15941594

15951595
/* Link test performed before hardware reset
15961596
* so autoneg doesn't interfere with test result
@@ -1612,7 +1612,7 @@ static void i40e_diag_test(struct net_device *netdev,
16121612
eth_test->flags |= ETH_TEST_FL_FAILED;
16131613

16141614
clear_bit(__I40E_TESTING, &pf->state);
1615-
i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
1615+
i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED));
16161616

16171617
if (if_running)
16181618
dev_open(netdev);
@@ -1645,7 +1645,7 @@ static void i40e_get_wol(struct net_device *netdev,
16451645

16461646
/* NVM bit on means WoL disabled for the port */
16471647
i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
1648-
if ((1 << hw->port) & wol_nvm_bits || hw->partition_id != 1) {
1648+
if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) {
16491649
wol->supported = 0;
16501650
wol->wolopts = 0;
16511651
} else {
@@ -1678,7 +1678,7 @@ static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
16781678

16791679
/* NVM bit on means WoL disabled for the port */
16801680
i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
1681-
if (((1 << hw->port) & wol_nvm_bits))
1681+
if (BIT(hw->port) & wol_nvm_bits)
16821682
return -EOPNOTSUPP;
16831683

16841684
/* only magic packet is supported */
@@ -2024,10 +2024,10 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
20242024
case TCP_V4_FLOW:
20252025
switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
20262026
case 0:
2027-
hena &= ~((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_TCP);
2027+
hena &= ~BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP);
20282028
break;
20292029
case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2030-
hena |= ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_TCP);
2030+
hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP);
20312031
break;
20322032
default:
20332033
return -EINVAL;
@@ -2036,10 +2036,10 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
20362036
case TCP_V6_FLOW:
20372037
switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
20382038
case 0:
2039-
hena &= ~((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_TCP);
2039+
hena &= ~BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP);
20402040
break;
20412041
case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2042-
hena |= ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_TCP);
2042+
hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP);
20432043
break;
20442044
default:
20452045
return -EINVAL;
@@ -2048,12 +2048,12 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
20482048
case UDP_V4_FLOW:
20492049
switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
20502050
case 0:
2051-
hena &= ~(((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) |
2052-
((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV4));
2051+
hena &= ~(BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) |
2052+
BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4));
20532053
break;
20542054
case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2055-
hena |= (((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) |
2056-
((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV4));
2055+
hena |= (BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) |
2056+
BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4));
20572057
break;
20582058
default:
20592059
return -EINVAL;
@@ -2062,12 +2062,12 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
20622062
case UDP_V6_FLOW:
20632063
switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
20642064
case 0:
2065-
hena &= ~(((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) |
2066-
((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV6));
2065+
hena &= ~(BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) |
2066+
BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6));
20672067
break;
20682068
case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2069-
hena |= (((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) |
2070-
((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV6));
2069+
hena |= (BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) |
2070+
BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6));
20712071
break;
20722072
default:
20732073
return -EINVAL;
@@ -2080,7 +2080,7 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
20802080
if ((nfc->data & RXH_L4_B_0_1) ||
20812081
(nfc->data & RXH_L4_B_2_3))
20822082
return -EINVAL;
2083-
hena |= ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_OTHER);
2083+
hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER);
20842084
break;
20852085
case AH_ESP_V6_FLOW:
20862086
case AH_V6_FLOW:
@@ -2089,15 +2089,15 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
20892089
if ((nfc->data & RXH_L4_B_0_1) ||
20902090
(nfc->data & RXH_L4_B_2_3))
20912091
return -EINVAL;
2092-
hena |= ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_OTHER);
2092+
hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER);
20932093
break;
20942094
case IPV4_FLOW:
2095-
hena |= ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) |
2096-
((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV4);
2095+
hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) |
2096+
BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
20972097
break;
20982098
case IPV6_FLOW:
2099-
hena |= ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) |
2100-
((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV6);
2099+
hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) |
2100+
BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
21012101
break;
21022102
default:
21032103
return -EINVAL;

‎drivers/net/ethernet/intel/i40e/i40e_fcoe.c

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -298,8 +298,8 @@ int i40e_init_pf_fcoe(struct i40e_pf *pf)
298298

299299
/* enable FCoE hash filter */
300300
val = rd32(hw, I40E_PFQF_HENA(1));
301-
val |= 1 << (I40E_FILTER_PCTYPE_FCOE_OX - 32);
302-
val |= 1 << (I40E_FILTER_PCTYPE_FCOE_RX - 32);
301+
val |= BIT(I40E_FILTER_PCTYPE_FCOE_OX - 32);
302+
val |= BIT(I40E_FILTER_PCTYPE_FCOE_RX - 32);
303303
val &= I40E_PFQF_HENA_PTYPE_ENA_MASK;
304304
wr32(hw, I40E_PFQF_HENA(1), val);
305305

@@ -308,10 +308,10 @@ int i40e_init_pf_fcoe(struct i40e_pf *pf)
308308
pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
309309

310310
/* Reserve 4K DDP contexts and 20K filter size for FCoE */
311-
pf->fcoe_hmc_cntx_num = (1 << I40E_DMA_CNTX_SIZE_4K) *
312-
I40E_DMA_CNTX_BASE_SIZE;
311+
pf->fcoe_hmc_cntx_num = BIT(I40E_DMA_CNTX_SIZE_4K) *
312+
I40E_DMA_CNTX_BASE_SIZE;
313313
pf->fcoe_hmc_filt_num = pf->fcoe_hmc_cntx_num +
314-
(1 << I40E_HASH_FILTER_SIZE_16K) *
314+
BIT(I40E_HASH_FILTER_SIZE_16K) *
315315
I40E_HASH_FILTER_BASE_SIZE;
316316

317317
/* FCoE object: max 16K filter buckets and 4K DMA contexts */
@@ -348,7 +348,7 @@ u8 i40e_get_fcoe_tc_map(struct i40e_pf *pf)
348348
if (app.selector == IEEE_8021QAZ_APP_SEL_ETHERTYPE &&
349349
app.protocolid == ETH_P_FCOE) {
350350
tc = dcbcfg->etscfg.prioritytable[app.priority];
351-
enabled_tc |= (1 << tc);
351+
enabled_tc |= BIT(tc);
352352
break;
353353
}
354354
}

‎drivers/net/ethernet/intel/i40e/i40e_fcoe.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -59,9 +59,9 @@
5959
(((e) >> I40E_RX_PROG_STATUS_DESC_FCOE_CONFLICT_SHIFT) & 0x1)
6060

6161
#define I40E_RX_PROG_FCOE_ERROR_TBL_FULL_BIT \
62-
(1 << I40E_RX_PROG_STATUS_DESC_FCOE_TBL_FULL_SHIFT)
62+
BIT(I40E_RX_PROG_STATUS_DESC_FCOE_TBL_FULL_SHIFT)
6363
#define I40E_RX_PROG_FCOE_ERROR_CONFLICT_BIT \
64-
(1 << I40E_RX_PROG_STATUS_DESC_FCOE_CONFLICT_SHIFT)
64+
BIT(I40E_RX_PROG_STATUS_DESC_FCOE_CONFLICT_SHIFT)
6565

6666
#define I40E_RX_PROG_FCOE_ERROR_INVLFAIL(e) \
6767
I40E_RX_PROG_FCOE_ERROR_CONFLICT(e)

‎drivers/net/ethernet/intel/i40e/i40e_hmc.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -127,8 +127,8 @@ struct i40e_hmc_info {
127127
I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) | \
128128
((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) << \
129129
I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT) | \
130-
(1 << I40E_PFHMC_SDDATALOW_PMSDVALID_SHIFT); \
131-
val3 = (sd_index) | (1u << I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \
130+
BIT(I40E_PFHMC_SDDATALOW_PMSDVALID_SHIFT); \
131+
val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \
132132
wr32((hw), I40E_PFHMC_SDDATAHIGH, val1); \
133133
wr32((hw), I40E_PFHMC_SDDATALOW, val2); \
134134
wr32((hw), I40E_PFHMC_SDCMD, val3); \
@@ -147,7 +147,7 @@ struct i40e_hmc_info {
147147
I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) | \
148148
((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) << \
149149
I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT); \
150-
val3 = (sd_index) | (1u << I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \
150+
val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \
151151
wr32((hw), I40E_PFHMC_SDDATAHIGH, 0); \
152152
wr32((hw), I40E_PFHMC_SDDATALOW, val2); \
153153
wr32((hw), I40E_PFHMC_SDCMD, val3); \

0 commit comments

Comments
 (0)