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kbuild: doc: merge 'Special Rules' and 'Custom kbuild commands' sections
The two sections "3.10 Special Rules" and "7.8 Custom kbuild commands" are related because you must understand both of them when you write custom rules. Actually I do not understand the policy about what to go into "3 The kbuild files" and what into "7 Architecture Makefile". This commit reworks the custom rule explanation as follows: - Merged "7.8 Custom kbuild commands" into "3.10 Special Rules". - Reword "Special Rules" to "Custom Rules" for consistency. - Update the example for kecho because the blackfin Makefile does not exist any more. - Replace the example for cmd_<command> with a simpler one. Signed-off-by: Masahiro Yamada <[email protected]>
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Documentation/kbuild/makefiles.rst

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@@ -18,7 +18,7 @@ This document describes the Linux kernel Makefiles.
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--- 3.7 Compilation flags
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--- 3.8 <deleted>
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--- 3.9 Dependency tracking
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--- 3.10 Special Rules
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--- 3.10 Custom Rules
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--- 3.11 $(CC) support functions
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--- 3.12 $(LD) support functions
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--- 3.13 Script Invocation
@@ -46,7 +46,7 @@ This document describes the Linux kernel Makefiles.
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--- 7.5 Architecture-specific boot images
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--- 7.6 Building non-kbuild targets
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--- 7.7 Commands useful for building a boot image
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--- 7.8 Custom kbuild commands
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--- 7.8 <deleted>
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--- 7.9 Preprocessing linker scripts
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--- 7.10 Generic header files
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--- 7.11 Post-link pass
@@ -422,21 +422,21 @@ more details, with real examples.
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Thus, if you change an option to $(CC) all affected files will
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be re-compiled.
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3.10 Special Rules
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3.10 Custom Rules
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------------------
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Special rules are used when the kbuild infrastructure does
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Custom rules are used when the kbuild infrastructure does
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not provide the required support. A typical example is
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header files generated during the build process.
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Another example are the architecture-specific Makefiles which
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need special rules to prepare boot images etc.
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need custom rules to prepare boot images etc.
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Special rules are written as normal Make rules.
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Custom rules are written as normal Make rules.
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Kbuild is not executing in the directory where the Makefile is
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located, so all special rules shall provide a relative
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located, so all custom rules shall use a relative
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path to prerequisite files and target files.
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Two variables are used when defining special rules:
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Two variables are used when defining custom rules:
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$(src)
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$(src) is a relative path which points to the directory
@@ -454,7 +454,7 @@ more details, with real examples.
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$(obj)/53c8xx_d.h: $(src)/53c7,8xx.scr $(src)/script_asm.pl
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$(CPP) -DCHIP=810 - < $< | ... $(src)/script_asm.pl
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This is a special rule, following the normal syntax
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This is a custom rule, following the normal syntax
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required by make.
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The target file depends on two prerequisite files. References
@@ -471,11 +471,33 @@ more details, with real examples.
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Example::
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#arch/blackfin/boot/Makefile
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$(obj)/vmImage: $(obj)/vmlinux.gz
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$(call if_changed,uimage)
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@$(kecho) 'Kernel: $@ is ready'
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# arch/arm/Makefile
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$(BOOT_TARGETS): vmlinux
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$(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@
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@$(kecho) ' Kernel: $(boot)/$@ is ready'
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When kbuild is executing with KBUILD_VERBOSE=0, then only a shorthand
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of a command is normally displayed.
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To enable this behaviour for custom commands kbuild requires
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two variables to be set::
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quiet_cmd_<command> - what shall be echoed
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cmd_<command> - the command to execute
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Example::
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# lib/Makefile
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quiet_cmd_crc32 = GEN $@
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cmd_crc32 = $< > $@
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$(obj)/crc32table.h: $(obj)/gen_crc32table
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$(call cmd,crc32)
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When updating the $(obj)/crc32table.h target, the line:
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GEN lib/crc32table.h
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will be displayed with "make KBUILD_VERBOSE=0".
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3.11 $(CC) support functions
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----------------------------
@@ -744,7 +766,7 @@ Both possibilities are described in the following.
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as a prerequisite.
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This is possible in two ways:
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(1) List the prerequisite explicitly in a special rule.
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(1) List the prerequisite explicitly in a custom rule.
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Example::
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@@ -755,11 +777,11 @@ Both possibilities are described in the following.
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The target $(obj)/devlist.h will not be built before
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$(obj)/gen-devlist is updated. Note that references to
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the host programs in special rules must be prefixed with $(obj).
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the host programs in custom rules must be prefixed with $(obj).
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(2) Use always-y
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When there is no suitable special rule, and the host program
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When there is no suitable custom rule, and the host program
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shall be built when a makefile is entered, the always-y
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variable shall be used.
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@@ -1281,8 +1303,8 @@ When kbuild executes, the following steps are followed (roughly):
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otherwise the command line check will fail, and the target will
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always be built.
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Assignments to $(targets) are without $(obj)/ prefix.
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if_changed may be used in conjunction with custom commands as
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defined in 7.8 "Custom kbuild commands".
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if_changed may be used in conjunction with custom rules as
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defined in "3.10 Custom Rules".
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Note: It is a typical mistake to forget the FORCE prerequisite.
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Another common pitfall is that whitespace is sometimes
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targets += $(dtb-y)
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DTC_FLAGS ?= -p 1024
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7.8 Custom kbuild commands
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--------------------------
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When kbuild is executing with KBUILD_VERBOSE=0, then only a shorthand
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of a command is normally displayed.
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To enable this behaviour for custom commands kbuild requires
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two variables to be set::
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quiet_cmd_<command> - what shall be echoed
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cmd_<command> - the command to execute
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Example::
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#
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quiet_cmd_image = BUILD $@
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cmd_image = $(obj)/tools/build $(BUILDFLAGS) \
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$(obj)/vmlinux.bin > $@
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targets += bzImage
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$(obj)/bzImage: $(obj)/vmlinux.bin $(obj)/tools/build FORCE
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$(call if_changed,image)
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@echo 'Kernel: $@ is ready'
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When updating the $(obj)/bzImage target, the line:
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BUILD arch/x86/boot/bzImage
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will be displayed with "make KBUILD_VERBOSE=0".
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7.9 Preprocessing linker scripts
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--------------------------------
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