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Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 fixes from Catalin Marinas: - Relax VDSO alignment requirements so that the kernel-picked one (4K) does not conflict with the dynamic linker's one (64K) - VDSO gettimeofday fix - Barrier fixes for atomic operations and cache flushing - TLB invalidation when overriding early page mappings during boot - Wired up new 32-bit arm (compat) syscalls - LSM_MMAP_MIN_ADDR when COMPAT is enabled - defconfig update - Clean-up (comments, pgd_alloc). * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: defconfig: Expand default enabled features arm64: asm: remove redundant "cc" clobbers arm64: atomics: fix use of acquire + release for full barrier semantics arm64: barriers: allow dsb macro to take option parameter security: select correct default LSM_MMAP_MIN_ADDR on arm on arm64 arm64: compat: Wire up new AArch32 syscalls arm64: vdso: update wtm fields for CLOCK_MONOTONIC_COARSE arm64: vdso: fix coarse clock handling arm64: simplify pgd_alloc arm64: fix typo: s/SERRROR/SERROR/ arm64: Invalidate the TLB when replacing pmd entries during boot arm64: Align CMA sizes to PAGE_SIZE arm64: add DSB after icache flush in __flush_icache_all() arm64: vdso: prevent ld from aligning PT_LOAD segments to 64k
2 parents d94d0e2 + 55834a7 commit 42be3f3

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20 files changed

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-67
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20 files changed

+102
-67
lines changed

‎arch/arm64/Kconfig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,7 @@ config ARM64
3636
select HAVE_GENERIC_DMA_COHERENT
3737
select HAVE_HW_BREAKPOINT if PERF_EVENTS
3838
select HAVE_MEMBLOCK
39+
select HAVE_PATA_PLATFORM
3940
select HAVE_PERF_EVENTS
4041
select IRQ_DOMAIN
4142
select MODULES_USE_ELF_RELA

‎arch/arm64/configs/defconfig

Lines changed: 14 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,3 @@
1-
CONFIG_EXPERIMENTAL=y
21
# CONFIG_LOCALVERSION_AUTO is not set
32
# CONFIG_SWAP is not set
43
CONFIG_SYSVIPC=y
@@ -19,6 +18,7 @@ CONFIG_BLK_DEV_INITRD=y
1918
CONFIG_KALLSYMS_ALL=y
2019
# CONFIG_COMPAT_BRK is not set
2120
CONFIG_PROFILING=y
21+
CONFIG_JUMP_LABEL=y
2222
CONFIG_MODULES=y
2323
CONFIG_MODULE_UNLOAD=y
2424
# CONFIG_BLK_DEV_BSG is not set
@@ -27,6 +27,7 @@ CONFIG_ARCH_VEXPRESS=y
2727
CONFIG_ARCH_XGENE=y
2828
CONFIG_SMP=y
2929
CONFIG_PREEMPT=y
30+
CONFIG_CMA=y
3031
CONFIG_CMDLINE="console=ttyAMA0"
3132
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
3233
CONFIG_COMPAT=y
@@ -42,14 +43,17 @@ CONFIG_IP_PNP_BOOTP=y
4243
# CONFIG_WIRELESS is not set
4344
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
4445
CONFIG_DEVTMPFS=y
45-
CONFIG_BLK_DEV=y
46+
CONFIG_DMA_CMA=y
4647
CONFIG_SCSI=y
4748
# CONFIG_SCSI_PROC_FS is not set
4849
CONFIG_BLK_DEV_SD=y
4950
# CONFIG_SCSI_LOWLEVEL is not set
51+
CONFIG_ATA=y
52+
CONFIG_PATA_PLATFORM=y
53+
CONFIG_PATA_OF_PLATFORM=y
5054
CONFIG_NETDEVICES=y
51-
CONFIG_MII=y
5255
CONFIG_SMC91X=y
56+
CONFIG_SMSC911X=y
5357
# CONFIG_WLAN is not set
5458
CONFIG_INPUT_EVDEV=y
5559
# CONFIG_SERIO_I8042 is not set
@@ -62,13 +66,19 @@ CONFIG_SERIAL_AMBA_PL011=y
6266
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
6367
# CONFIG_HW_RANDOM is not set
6468
# CONFIG_HWMON is not set
69+
CONFIG_REGULATOR=y
70+
CONFIG_REGULATOR_FIXED_VOLTAGE=y
6571
CONFIG_FB=y
6672
# CONFIG_VGA_CONSOLE is not set
6773
CONFIG_FRAMEBUFFER_CONSOLE=y
6874
CONFIG_LOGO=y
6975
# CONFIG_LOGO_LINUX_MONO is not set
7076
# CONFIG_LOGO_LINUX_VGA16 is not set
71-
# CONFIG_USB_SUPPORT is not set
77+
CONFIG_USB=y
78+
CONFIG_USB_ISP1760_HCD=y
79+
CONFIG_USB_STORAGE=y
80+
CONFIG_MMC=y
81+
CONFIG_MMC_ARMMMCI=y
7282
# CONFIG_IOMMU_SUPPORT is not set
7383
CONFIG_EXT2_FS=y
7484
CONFIG_EXT3_FS=y

‎arch/arm64/include/asm/atomic.h

Lines changed: 30 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -54,8 +54,7 @@ static inline void atomic_add(int i, atomic_t *v)
5454
" stxr %w1, %w0, %2\n"
5555
" cbnz %w1, 1b"
5656
: "=&r" (result), "=&r" (tmp), "+Q" (v->counter)
57-
: "Ir" (i)
58-
: "cc");
57+
: "Ir" (i));
5958
}
6059

6160
static inline int atomic_add_return(int i, atomic_t *v)
@@ -64,14 +63,15 @@ static inline int atomic_add_return(int i, atomic_t *v)
6463
int result;
6564

6665
asm volatile("// atomic_add_return\n"
67-
"1: ldaxr %w0, %2\n"
66+
"1: ldxr %w0, %2\n"
6867
" add %w0, %w0, %w3\n"
6968
" stlxr %w1, %w0, %2\n"
7069
" cbnz %w1, 1b"
7170
: "=&r" (result), "=&r" (tmp), "+Q" (v->counter)
7271
: "Ir" (i)
73-
: "cc", "memory");
72+
: "memory");
7473

74+
smp_mb();
7575
return result;
7676
}
7777

@@ -86,8 +86,7 @@ static inline void atomic_sub(int i, atomic_t *v)
8686
" stxr %w1, %w0, %2\n"
8787
" cbnz %w1, 1b"
8888
: "=&r" (result), "=&r" (tmp), "+Q" (v->counter)
89-
: "Ir" (i)
90-
: "cc");
89+
: "Ir" (i));
9190
}
9291

9392
static inline int atomic_sub_return(int i, atomic_t *v)
@@ -96,14 +95,15 @@ static inline int atomic_sub_return(int i, atomic_t *v)
9695
int result;
9796

9897
asm volatile("// atomic_sub_return\n"
99-
"1: ldaxr %w0, %2\n"
98+
"1: ldxr %w0, %2\n"
10099
" sub %w0, %w0, %w3\n"
101100
" stlxr %w1, %w0, %2\n"
102101
" cbnz %w1, 1b"
103102
: "=&r" (result), "=&r" (tmp), "+Q" (v->counter)
104103
: "Ir" (i)
105-
: "cc", "memory");
104+
: "memory");
106105

106+
smp_mb();
107107
return result;
108108
}
109109

@@ -112,17 +112,20 @@ static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
112112
unsigned long tmp;
113113
int oldval;
114114

115+
smp_mb();
116+
115117
asm volatile("// atomic_cmpxchg\n"
116-
"1: ldaxr %w1, %2\n"
118+
"1: ldxr %w1, %2\n"
117119
" cmp %w1, %w3\n"
118120
" b.ne 2f\n"
119-
" stlxr %w0, %w4, %2\n"
121+
" stxr %w0, %w4, %2\n"
120122
" cbnz %w0, 1b\n"
121123
"2:"
122124
: "=&r" (tmp), "=&r" (oldval), "+Q" (ptr->counter)
123125
: "Ir" (old), "r" (new)
124-
: "cc", "memory");
126+
: "cc");
125127

128+
smp_mb();
126129
return oldval;
127130
}
128131

@@ -173,8 +176,7 @@ static inline void atomic64_add(u64 i, atomic64_t *v)
173176
" stxr %w1, %0, %2\n"
174177
" cbnz %w1, 1b"
175178
: "=&r" (result), "=&r" (tmp), "+Q" (v->counter)
176-
: "Ir" (i)
177-
: "cc");
179+
: "Ir" (i));
178180
}
179181

180182
static inline long atomic64_add_return(long i, atomic64_t *v)
@@ -183,14 +185,15 @@ static inline long atomic64_add_return(long i, atomic64_t *v)
183185
unsigned long tmp;
184186

185187
asm volatile("// atomic64_add_return\n"
186-
"1: ldaxr %0, %2\n"
188+
"1: ldxr %0, %2\n"
187189
" add %0, %0, %3\n"
188190
" stlxr %w1, %0, %2\n"
189191
" cbnz %w1, 1b"
190192
: "=&r" (result), "=&r" (tmp), "+Q" (v->counter)
191193
: "Ir" (i)
192-
: "cc", "memory");
194+
: "memory");
193195

196+
smp_mb();
194197
return result;
195198
}
196199

@@ -205,8 +208,7 @@ static inline void atomic64_sub(u64 i, atomic64_t *v)
205208
" stxr %w1, %0, %2\n"
206209
" cbnz %w1, 1b"
207210
: "=&r" (result), "=&r" (tmp), "+Q" (v->counter)
208-
: "Ir" (i)
209-
: "cc");
211+
: "Ir" (i));
210212
}
211213

212214
static inline long atomic64_sub_return(long i, atomic64_t *v)
@@ -215,14 +217,15 @@ static inline long atomic64_sub_return(long i, atomic64_t *v)
215217
unsigned long tmp;
216218

217219
asm volatile("// atomic64_sub_return\n"
218-
"1: ldaxr %0, %2\n"
220+
"1: ldxr %0, %2\n"
219221
" sub %0, %0, %3\n"
220222
" stlxr %w1, %0, %2\n"
221223
" cbnz %w1, 1b"
222224
: "=&r" (result), "=&r" (tmp), "+Q" (v->counter)
223225
: "Ir" (i)
224-
: "cc", "memory");
226+
: "memory");
225227

228+
smp_mb();
226229
return result;
227230
}
228231

@@ -231,17 +234,20 @@ static inline long atomic64_cmpxchg(atomic64_t *ptr, long old, long new)
231234
long oldval;
232235
unsigned long res;
233236

237+
smp_mb();
238+
234239
asm volatile("// atomic64_cmpxchg\n"
235-
"1: ldaxr %1, %2\n"
240+
"1: ldxr %1, %2\n"
236241
" cmp %1, %3\n"
237242
" b.ne 2f\n"
238-
" stlxr %w0, %4, %2\n"
243+
" stxr %w0, %4, %2\n"
239244
" cbnz %w0, 1b\n"
240245
"2:"
241246
: "=&r" (res), "=&r" (oldval), "+Q" (ptr->counter)
242247
: "Ir" (old), "r" (new)
243-
: "cc", "memory");
248+
: "cc");
244249

250+
smp_mb();
245251
return oldval;
246252
}
247253

@@ -253,11 +259,12 @@ static inline long atomic64_dec_if_positive(atomic64_t *v)
253259
unsigned long tmp;
254260

255261
asm volatile("// atomic64_dec_if_positive\n"
256-
"1: ldaxr %0, %2\n"
262+
"1: ldxr %0, %2\n"
257263
" subs %0, %0, #1\n"
258264
" b.mi 2f\n"
259265
" stlxr %w1, %0, %2\n"
260266
" cbnz %w1, 1b\n"
267+
" dmb ish\n"
261268
"2:"
262269
: "=&r" (result), "=&r" (tmp), "+Q" (v->counter)
263270
:

‎arch/arm64/include/asm/barrier.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@
2525
#define wfi() asm volatile("wfi" : : : "memory")
2626

2727
#define isb() asm volatile("isb" : : : "memory")
28-
#define dsb() asm volatile("dsb sy" : : : "memory")
28+
#define dsb(opt) asm volatile("dsb sy" : : : "memory")
2929

3030
#define mb() dsb()
3131
#define rmb() asm volatile("dsb ld" : : : "memory")

‎arch/arm64/include/asm/cacheflush.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -116,6 +116,7 @@ extern void flush_dcache_page(struct page *);
116116
static inline void __flush_icache_all(void)
117117
{
118118
asm("ic ialluis");
119+
dsb();
119120
}
120121

121122
#define flush_dcache_mmap_lock(mapping) \

‎arch/arm64/include/asm/cmpxchg.h

Lines changed: 9 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -29,44 +29,45 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
2929
switch (size) {
3030
case 1:
3131
asm volatile("// __xchg1\n"
32-
"1: ldaxrb %w0, %2\n"
32+
"1: ldxrb %w0, %2\n"
3333
" stlxrb %w1, %w3, %2\n"
3434
" cbnz %w1, 1b\n"
3535
: "=&r" (ret), "=&r" (tmp), "+Q" (*(u8 *)ptr)
3636
: "r" (x)
37-
: "cc", "memory");
37+
: "memory");
3838
break;
3939
case 2:
4040
asm volatile("// __xchg2\n"
41-
"1: ldaxrh %w0, %2\n"
41+
"1: ldxrh %w0, %2\n"
4242
" stlxrh %w1, %w3, %2\n"
4343
" cbnz %w1, 1b\n"
4444
: "=&r" (ret), "=&r" (tmp), "+Q" (*(u16 *)ptr)
4545
: "r" (x)
46-
: "cc", "memory");
46+
: "memory");
4747
break;
4848
case 4:
4949
asm volatile("// __xchg4\n"
50-
"1: ldaxr %w0, %2\n"
50+
"1: ldxr %w0, %2\n"
5151
" stlxr %w1, %w3, %2\n"
5252
" cbnz %w1, 1b\n"
5353
: "=&r" (ret), "=&r" (tmp), "+Q" (*(u32 *)ptr)
5454
: "r" (x)
55-
: "cc", "memory");
55+
: "memory");
5656
break;
5757
case 8:
5858
asm volatile("// __xchg8\n"
59-
"1: ldaxr %0, %2\n"
59+
"1: ldxr %0, %2\n"
6060
" stlxr %w1, %3, %2\n"
6161
" cbnz %w1, 1b\n"
6262
: "=&r" (ret), "=&r" (tmp), "+Q" (*(u64 *)ptr)
6363
: "r" (x)
64-
: "cc", "memory");
64+
: "memory");
6565
break;
6666
default:
6767
BUILD_BUG();
6868
}
6969

70+
smp_mb();
7071
return ret;
7172
}
7273

‎arch/arm64/include/asm/esr.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@
4242
#define ESR_EL1_EC_SP_ALIGN (0x26)
4343
#define ESR_EL1_EC_FP_EXC32 (0x28)
4444
#define ESR_EL1_EC_FP_EXC64 (0x2C)
45-
#define ESR_EL1_EC_SERRROR (0x2F)
45+
#define ESR_EL1_EC_SERROR (0x2F)
4646
#define ESR_EL1_EC_BREAKPT_EL0 (0x30)
4747
#define ESR_EL1_EC_BREAKPT_EL1 (0x31)
4848
#define ESR_EL1_EC_SOFTSTP_EL0 (0x32)

‎arch/arm64/include/asm/futex.h

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -24,10 +24,11 @@
2424

2525
#define __futex_atomic_op(insn, ret, oldval, uaddr, tmp, oparg) \
2626
asm volatile( \
27-
"1: ldaxr %w1, %2\n" \
27+
"1: ldxr %w1, %2\n" \
2828
insn "\n" \
2929
"2: stlxr %w3, %w0, %2\n" \
3030
" cbnz %w3, 1b\n" \
31+
" dmb ish\n" \
3132
"3:\n" \
3233
" .pushsection .fixup,\"ax\"\n" \
3334
" .align 2\n" \
@@ -40,7 +41,7 @@
4041
" .popsection\n" \
4142
: "=&r" (ret), "=&r" (oldval), "+Q" (*uaddr), "=&r" (tmp) \
4243
: "r" (oparg), "Ir" (-EFAULT) \
43-
: "cc", "memory")
44+
: "memory")
4445

4546
static inline int
4647
futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
@@ -111,11 +112,12 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
111112
return -EFAULT;
112113

113114
asm volatile("// futex_atomic_cmpxchg_inatomic\n"
114-
"1: ldaxr %w1, %2\n"
115+
"1: ldxr %w1, %2\n"
115116
" sub %w3, %w1, %w4\n"
116117
" cbnz %w3, 3f\n"
117118
"2: stlxr %w3, %w5, %2\n"
118119
" cbnz %w3, 1b\n"
120+
" dmb ish\n"
119121
"3:\n"
120122
" .pushsection .fixup,\"ax\"\n"
121123
"4: mov %w0, %w6\n"
@@ -127,7 +129,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
127129
" .popsection\n"
128130
: "+r" (ret), "=&r" (val), "+Q" (*uaddr), "=&r" (tmp)
129131
: "r" (oldval), "r" (newval), "Ir" (-EFAULT)
130-
: "cc", "memory");
132+
: "memory");
131133

132134
*uval = val;
133135
return ret;

‎arch/arm64/include/asm/kvm_arm.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -231,7 +231,7 @@
231231
#define ESR_EL2_EC_SP_ALIGN (0x26)
232232
#define ESR_EL2_EC_FP_EXC32 (0x28)
233233
#define ESR_EL2_EC_FP_EXC64 (0x2C)
234-
#define ESR_EL2_EC_SERRROR (0x2F)
234+
#define ESR_EL2_EC_SERROR (0x2F)
235235
#define ESR_EL2_EC_BREAKPT (0x30)
236236
#define ESR_EL2_EC_BREAKPT_HYP (0x31)
237237
#define ESR_EL2_EC_SOFTSTP (0x32)

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