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IB/mlx5: Fix cleanup order on unload
On load we create private CQ/QP/PD in order to be used by UMR, we create those resources after we register ourself as an IB device, and we destroy them after we unregister as an IB device. This was changed by commit 16c1975 ("IB/mlx5: Create profile infrastructure to add and remove stages") which moved the destruction before we unregistration. This allowed to trigger an invalid memory access when unloading mlx5_ib while there are open resources: BUG: unable to handle kernel paging request at 00000001002c012c ... Call Trace: mlx5_ib_post_send_wait+0x75/0x110 [mlx5_ib] __slab_free+0x9a/0x2d0 delay_time_func+0x10/0x10 [mlx5_ib] unreg_umr.isra.15+0x4b/0x50 [mlx5_ib] mlx5_mr_cache_free+0x46/0x150 [mlx5_ib] clean_mr+0xc9/0x190 [mlx5_ib] dereg_mr+0xba/0xf0 [mlx5_ib] ib_dereg_mr+0x13/0x20 [ib_core] remove_commit_idr_uobject+0x16/0x70 [ib_uverbs] uverbs_cleanup_ucontext+0xe8/0x1a0 [ib_uverbs] ib_uverbs_cleanup_ucontext.isra.9+0x19/0x40 [ib_uverbs] ib_uverbs_remove_one+0x162/0x2e0 [ib_uverbs] ib_unregister_device+0xd4/0x190 [ib_core] __mlx5_ib_remove+0x2e/0x40 [mlx5_ib] mlx5_remove_device+0xf5/0x120 [mlx5_core] mlx5_unregister_interface+0x37/0x90 [mlx5_core] mlx5_ib_cleanup+0xc/0x225 [mlx5_ib] SyS_delete_module+0x153/0x230 do_syscall_64+0x62/0x110 entry_SYSCALL_64_after_hwframe+0x21/0x86 ... We restore the original behavior by breaking the UMR stage into two parts, pre and post IB registration stages, this way we can restore the original functionality and maintain clean separation of logic between stages. Fixes: 16c1975 ("IB/mlx5: Create profile infrastructure to add and remove stages") Signed-off-by: Mark Bloch <[email protected]> Signed-off-by: Leon Romanovsky <[email protected]> Signed-off-by: Doug Ledford <[email protected]>
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2 files changed

+14
-10
lines changed

2 files changed

+14
-10
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drivers/infiniband/hw/mlx5/main.c

Lines changed: 12 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -4860,19 +4860,19 @@ static int mlx5_ib_stage_ib_reg_init(struct mlx5_ib_dev *dev)
48604860
return ib_register_device(&dev->ib_dev, NULL);
48614861
}
48624862

4863-
static void mlx5_ib_stage_ib_reg_cleanup(struct mlx5_ib_dev *dev)
4863+
static void mlx5_ib_stage_pre_ib_reg_umr_cleanup(struct mlx5_ib_dev *dev)
48644864
{
4865-
ib_unregister_device(&dev->ib_dev);
4865+
destroy_umrc_res(dev);
48664866
}
48674867

4868-
static int mlx5_ib_stage_umr_res_init(struct mlx5_ib_dev *dev)
4868+
static void mlx5_ib_stage_ib_reg_cleanup(struct mlx5_ib_dev *dev)
48694869
{
4870-
return create_umr_res(dev);
4870+
ib_unregister_device(&dev->ib_dev);
48714871
}
48724872

4873-
static void mlx5_ib_stage_umr_res_cleanup(struct mlx5_ib_dev *dev)
4873+
static int mlx5_ib_stage_post_ib_reg_umr_init(struct mlx5_ib_dev *dev)
48744874
{
4875-
destroy_umrc_res(dev);
4875+
return create_umr_res(dev);
48764876
}
48774877

48784878
static int mlx5_ib_stage_delay_drop_init(struct mlx5_ib_dev *dev)
@@ -4982,12 +4982,15 @@ static const struct mlx5_ib_profile pf_profile = {
49824982
STAGE_CREATE(MLX5_IB_STAGE_BFREG,
49834983
mlx5_ib_stage_bfrag_init,
49844984
mlx5_ib_stage_bfrag_cleanup),
4985+
STAGE_CREATE(MLX5_IB_STAGE_PRE_IB_REG_UMR,
4986+
NULL,
4987+
mlx5_ib_stage_pre_ib_reg_umr_cleanup),
49854988
STAGE_CREATE(MLX5_IB_STAGE_IB_REG,
49864989
mlx5_ib_stage_ib_reg_init,
49874990
mlx5_ib_stage_ib_reg_cleanup),
4988-
STAGE_CREATE(MLX5_IB_STAGE_UMR_RESOURCES,
4989-
mlx5_ib_stage_umr_res_init,
4990-
mlx5_ib_stage_umr_res_cleanup),
4991+
STAGE_CREATE(MLX5_IB_STAGE_POST_IB_REG_UMR,
4992+
mlx5_ib_stage_post_ib_reg_umr_init,
4993+
NULL),
49914994
STAGE_CREATE(MLX5_IB_STAGE_DELAY_DROP,
49924995
mlx5_ib_stage_delay_drop_init,
49934996
mlx5_ib_stage_delay_drop_cleanup),

drivers/infiniband/hw/mlx5/mlx5_ib.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -739,8 +739,9 @@ enum mlx5_ib_stages {
739739
MLX5_IB_STAGE_CONG_DEBUGFS,
740740
MLX5_IB_STAGE_UAR,
741741
MLX5_IB_STAGE_BFREG,
742+
MLX5_IB_STAGE_PRE_IB_REG_UMR,
742743
MLX5_IB_STAGE_IB_REG,
743-
MLX5_IB_STAGE_UMR_RESOURCES,
744+
MLX5_IB_STAGE_POST_IB_REG_UMR,
744745
MLX5_IB_STAGE_DELAY_DROP,
745746
MLX5_IB_STAGE_CLASS_ATTR,
746747
MLX5_IB_STAGE_MAX,

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