|
223 | 223 | };
|
224 | 224 | };
|
225 | 225 |
|
| 226 | + thermal-zones { |
| 227 | + cpu-thermal0 { |
| 228 | + polling-delay-passive = <250>; |
| 229 | + polling-delay = <1000>; |
| 230 | + |
| 231 | + thermal-sensors = <&tsens0 6>; |
| 232 | + |
| 233 | + trips { |
| 234 | + cpu_alert0: trip0 { |
| 235 | + temperature = <75000>; |
| 236 | + hysteresis = <2000>; |
| 237 | + type = "passive"; |
| 238 | + }; |
| 239 | + |
| 240 | + cpu_crit0: trip1 { |
| 241 | + temperature = <110000>; |
| 242 | + hysteresis = <2000>; |
| 243 | + type = "critical"; |
| 244 | + }; |
| 245 | + }; |
| 246 | + }; |
| 247 | + |
| 248 | + cpu-thermal1 { |
| 249 | + polling-delay-passive = <250>; |
| 250 | + polling-delay = <1000>; |
| 251 | + |
| 252 | + thermal-sensors = <&tsens0 7>; |
| 253 | + |
| 254 | + trips { |
| 255 | + cpu_alert1: trip0 { |
| 256 | + temperature = <75000>; |
| 257 | + hysteresis = <2000>; |
| 258 | + type = "passive"; |
| 259 | + }; |
| 260 | + |
| 261 | + cpu_crit1: trip1 { |
| 262 | + temperature = <110000>; |
| 263 | + hysteresis = <2000>; |
| 264 | + type = "critical"; |
| 265 | + }; |
| 266 | + }; |
| 267 | + }; |
| 268 | + |
| 269 | + cpu-thermal2 { |
| 270 | + polling-delay-passive = <250>; |
| 271 | + polling-delay = <1000>; |
| 272 | + |
| 273 | + thermal-sensors = <&tsens0 8>; |
| 274 | + |
| 275 | + trips { |
| 276 | + cpu_alert2: trip0 { |
| 277 | + temperature = <75000>; |
| 278 | + hysteresis = <2000>; |
| 279 | + type = "passive"; |
| 280 | + }; |
| 281 | + |
| 282 | + cpu_crit2: trip1 { |
| 283 | + temperature = <110000>; |
| 284 | + hysteresis = <2000>; |
| 285 | + type = "critical"; |
| 286 | + }; |
| 287 | + }; |
| 288 | + }; |
| 289 | + |
| 290 | + cpu-thermal3 { |
| 291 | + polling-delay-passive = <250>; |
| 292 | + polling-delay = <1000>; |
| 293 | + |
| 294 | + thermal-sensors = <&tsens0 9>; |
| 295 | + |
| 296 | + trips { |
| 297 | + cpu_alert3: trip0 { |
| 298 | + temperature = <75000>; |
| 299 | + hysteresis = <2000>; |
| 300 | + type = "passive"; |
| 301 | + }; |
| 302 | + |
| 303 | + cpu_crit3: trip1 { |
| 304 | + temperature = <110000>; |
| 305 | + hysteresis = <2000>; |
| 306 | + type = "critical"; |
| 307 | + }; |
| 308 | + }; |
| 309 | + }; |
| 310 | + |
| 311 | + cpu-thermal4 { |
| 312 | + polling-delay-passive = <250>; |
| 313 | + polling-delay = <1000>; |
| 314 | + |
| 315 | + thermal-sensors = <&tsens0 10>; |
| 316 | + |
| 317 | + trips { |
| 318 | + cpu_alert4: trip0 { |
| 319 | + temperature = <75000>; |
| 320 | + hysteresis = <2000>; |
| 321 | + type = "passive"; |
| 322 | + }; |
| 323 | + |
| 324 | + cpu_crit4: trip1 { |
| 325 | + temperature = <110000>; |
| 326 | + hysteresis = <2000>; |
| 327 | + type = "critical"; |
| 328 | + }; |
| 329 | + }; |
| 330 | + }; |
| 331 | + |
| 332 | + cpu-thermal5 { |
| 333 | + polling-delay-passive = <250>; |
| 334 | + polling-delay = <1000>; |
| 335 | + |
| 336 | + thermal-sensors = <&tsens0 11>; |
| 337 | + |
| 338 | + trips { |
| 339 | + cpu_alert5: trip0 { |
| 340 | + temperature = <75000>; |
| 341 | + hysteresis = <2000>; |
| 342 | + type = "passive"; |
| 343 | + }; |
| 344 | + |
| 345 | + cpu_crit5: trip1 { |
| 346 | + temperature = <110000>; |
| 347 | + hysteresis = <2000>; |
| 348 | + type = "critical"; |
| 349 | + }; |
| 350 | + }; |
| 351 | + }; |
| 352 | + |
| 353 | + cpu-thermal6 { |
| 354 | + polling-delay-passive = <250>; |
| 355 | + polling-delay = <1000>; |
| 356 | + |
| 357 | + thermal-sensors = <&tsens1 0>; |
| 358 | + |
| 359 | + trips { |
| 360 | + cpu_alert6: trip0 { |
| 361 | + temperature = <75000>; |
| 362 | + hysteresis = <2000>; |
| 363 | + type = "passive"; |
| 364 | + }; |
| 365 | + |
| 366 | + cpu_crit6: trip1 { |
| 367 | + temperature = <110000>; |
| 368 | + hysteresis = <2000>; |
| 369 | + type = "critical"; |
| 370 | + }; |
| 371 | + }; |
| 372 | + }; |
| 373 | + |
| 374 | + cpu-thermal7 { |
| 375 | + polling-delay-passive = <250>; |
| 376 | + polling-delay = <1000>; |
| 377 | + |
| 378 | + thermal-sensors = <&tsens1 1>; |
| 379 | + |
| 380 | + trips { |
| 381 | + cpu_alert7: trip0 { |
| 382 | + temperature = <75000>; |
| 383 | + hysteresis = <2000>; |
| 384 | + type = "passive"; |
| 385 | + }; |
| 386 | + |
| 387 | + cpu_crit7: trip1 { |
| 388 | + temperature = <110000>; |
| 389 | + hysteresis = <2000>; |
| 390 | + type = "critical"; |
| 391 | + }; |
| 392 | + }; |
| 393 | + }; |
| 394 | + |
| 395 | + gpu-thermal { |
| 396 | + polling-delay-passive = <250>; |
| 397 | + polling-delay = <1000>; |
| 398 | + |
| 399 | + thermal-sensors = <&tsens1 3>; |
| 400 | + }; |
| 401 | + }; |
| 402 | + |
226 | 403 | timer {
|
227 | 404 | compatible = "arm,armv8-timer";
|
228 | 405 | interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
|
|
279 | 456 | cell-index = <0>;
|
280 | 457 | };
|
281 | 458 |
|
| 459 | + tsens0: thermal@10aa000 { |
| 460 | + compatible = "qcom,msm8998-tsens", "qcom,tsens-v2"; |
| 461 | + reg = <0x10aa000 0x2000>; |
| 462 | + |
| 463 | + #qcom,sensors = <12>; |
| 464 | + #thermal-sensor-cells = <1>; |
| 465 | + }; |
| 466 | + |
| 467 | + tsens1: thermal@10ad000 { |
| 468 | + compatible = "qcom,msm8998-tsens", "qcom,tsens-v2"; |
| 469 | + reg = <0x10ad000 0x2000>; |
| 470 | + |
| 471 | + #qcom,sensors = <8>; |
| 472 | + #thermal-sensor-cells = <1>; |
| 473 | + }; |
| 474 | + |
282 | 475 | apcs_glb: mailbox@9820000 {
|
283 | 476 | compatible = "qcom,msm8998-apcs-hmss-global";
|
284 | 477 | reg = <0x17911000 0x1000>;
|
|
0 commit comments