Skip to content

Commit 44bfc42

Browse files
Andre-ARMchazy
authored andcommitted
KVM: arm/arm64: move GICv2 emulation defines into arm-gic-v3.h
As (some) GICv3 hosts can emulate a GICv2, some GICv2 specific masks for the list register definition also apply to GICv3 LRs. At the moment we have those definitions in the KVM VGICv3 implementation, so let's move them into the GICv3 header file to have them automatically defined. Signed-off-by: Andre Przywara <[email protected]> Acked-by: Marc Zyngier <[email protected]>
1 parent b13216c commit 44bfc42

File tree

2 files changed

+6
-7
lines changed

2 files changed

+6
-7
lines changed

include/linux/irqchip/arm-gic-v3.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -276,6 +276,11 @@
276276
#define ICH_LR_PHYS_ID_SHIFT 32
277277
#define ICH_LR_PHYS_ID_MASK (0x3ffULL << ICH_LR_PHYS_ID_SHIFT)
278278

279+
/* These are for GICv2 emulation only */
280+
#define GICH_LR_VIRTUALID (0x3ffUL << 0)
281+
#define GICH_LR_PHYSID_CPUID_SHIFT (10)
282+
#define GICH_LR_PHYSID_CPUID (7UL << GICH_LR_PHYSID_CPUID_SHIFT)
283+
279284
#define ICH_MISR_EOI (1 << 0)
280285
#define ICH_MISR_U (1 << 1)
281286

virt/kvm/arm/vgic-v3.c

Lines changed: 1 addition & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -29,12 +29,6 @@
2929
#include <asm/kvm_asm.h>
3030
#include <asm/kvm_mmu.h>
3131

32-
/* These are for GICv2 emulation only */
33-
#define GICH_LR_VIRTUALID (0x3ffUL << 0)
34-
#define GICH_LR_PHYSID_CPUID_SHIFT (10)
35-
#define GICH_LR_PHYSID_CPUID (7UL << GICH_LR_PHYSID_CPUID_SHIFT)
36-
#define ICH_LR_VIRTUALID_MASK (BIT_ULL(32) - 1)
37-
3832
static u32 ich_vtr_el2;
3933

4034
static struct vgic_lr vgic_v3_get_lr(const struct kvm_vcpu *vcpu, int lr)
@@ -43,7 +37,7 @@ static struct vgic_lr vgic_v3_get_lr(const struct kvm_vcpu *vcpu, int lr)
4337
u64 val = vcpu->arch.vgic_cpu.vgic_v3.vgic_lr[lr];
4438

4539
if (vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3)
46-
lr_desc.irq = val & ICH_LR_VIRTUALID_MASK;
40+
lr_desc.irq = val & ICH_LR_VIRTUAL_ID_MASK;
4741
else
4842
lr_desc.irq = val & GICH_LR_VIRTUALID;
4943

0 commit comments

Comments
 (0)