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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-next
Pull sparc updates from David Miller: 1) Add support for ADI (Application Data Integrity) found in more recent sparc64 cpus. Essentially this is keyed based access to virtual memory, and if the key encoded in the virual address is wrong you get a trap. The mm changes were reviewed by Andrew Morton and others. Work by Khalid Aziz. 2) Validate DAX completion index range properly, from Rob Gardner. 3) Add proper Kconfig deps for DAX driver. From Guenter Roeck. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-next: sparc64: Make atomic_xchg() an inline function rather than a macro. sparc64: Properly range check DAX completion index sparc: Make auxiliary vectors for ADI available on 32-bit as well sparc64: Oracle DAX driver depends on SPARC64 sparc64: Update signal delivery to use new helper functions sparc64: Add support for ADI (Application Data Integrity) mm: Allow arch code to override copy_highpage() mm: Clear arch specific VM flags on protection change mm: Add address parameter to arch_validate_prot() sparc64: Add auxiliary vectors to report platform ADI properties sparc64: Add handler for "Memory Corruption Detected" trap sparc64: Add HV fault type handlers for ADI related faults sparc64: Add support for ADI register fields, ASIs and traps mm, swap: Add infrastructure for saving page metadata on swap signals, sparc: Add signal codes for ADI violations
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Documentation/sparc/adi.txt

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Application Data Integrity (ADI)
2+
================================
3+
4+
SPARC M7 processor adds the Application Data Integrity (ADI) feature.
5+
ADI allows a task to set version tags on any subset of its address
6+
space. Once ADI is enabled and version tags are set for ranges of
7+
address space of a task, the processor will compare the tag in pointers
8+
to memory in these ranges to the version set by the application
9+
previously. Access to memory is granted only if the tag in given pointer
10+
matches the tag set by the application. In case of mismatch, processor
11+
raises an exception.
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13+
Following steps must be taken by a task to enable ADI fully:
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15+
1. Set the user mode PSTATE.mcde bit. This acts as master switch for
16+
the task's entire address space to enable/disable ADI for the task.
17+
18+
2. Set TTE.mcd bit on any TLB entries that correspond to the range of
19+
addresses ADI is being enabled on. MMU checks the version tag only
20+
on the pages that have TTE.mcd bit set.
21+
22+
3. Set the version tag for virtual addresses using stxa instruction
23+
and one of the MCD specific ASIs. Each stxa instruction sets the
24+
given tag for one ADI block size number of bytes. This step must
25+
be repeated for entire page to set tags for entire page.
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27+
ADI block size for the platform is provided by the hypervisor to kernel
28+
in machine description tables. Hypervisor also provides the number of
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top bits in the virtual address that specify the version tag. Once
30+
version tag has been set for a memory location, the tag is stored in the
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physical memory and the same tag must be present in the ADI version tag
32+
bits of the virtual address being presented to the MMU. For example on
33+
SPARC M7 processor, MMU uses bits 63-60 for version tags and ADI block
34+
size is same as cacheline size which is 64 bytes. A task that sets ADI
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version to, say 10, on a range of memory, must access that memory using
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virtual addresses that contain 0xa in bits 63-60.
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ADI is enabled on a set of pages using mprotect() with PROT_ADI flag.
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When ADI is enabled on a set of pages by a task for the first time,
40+
kernel sets the PSTATE.mcde bit fot the task. Version tags for memory
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addresses are set with an stxa instruction on the addresses using
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ASI_MCD_PRIMARY or ASI_MCD_ST_BLKINIT_PRIMARY. ADI block size is
43+
provided by the hypervisor to the kernel. Kernel returns the value of
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ADI block size to userspace using auxiliary vector along with other ADI
45+
info. Following auxiliary vectors are provided by the kernel:
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AT_ADI_BLKSZ ADI block size. This is the granularity and
48+
alignment, in bytes, of ADI versioning.
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AT_ADI_NBITS Number of ADI version bits in the VA
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51+
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IMPORTANT NOTES:
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- Version tag values of 0x0 and 0xf are reserved. These values match any
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tag in virtual address and never generate a mismatch exception.
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- Version tags are set on virtual addresses from userspace even though
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tags are stored in physical memory. Tags are set on a physical page
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after it has been allocated to a task and a pte has been created for
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it.
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- When a task frees a memory page it had set version tags on, the page
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goes back to free page pool. When this page is re-allocated to a task,
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kernel clears the page using block initialization ASI which clears the
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version tags as well for the page. If a page allocated to a task is
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freed and allocated back to the same task, old version tags set by the
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task on that page will no longer be present.
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- ADI tag mismatches are not detected for non-faulting loads.
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- Kernel does not set any tags for user pages and it is entirely a
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task's responsibility to set any version tags. Kernel does ensure the
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version tags are preserved if a page is swapped out to the disk and
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swapped back in. It also preserves that version tags if a page is
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migrated.
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- ADI works for any size pages. A userspace task need not be aware of
78+
page size when using ADI. It can simply select a virtual address
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range, enable ADI on the range using mprotect() and set version tags
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for the entire range. mprotect() ensures range is aligned to page size
81+
and is a multiple of page size.
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83+
- ADI tags can only be set on writable memory. For example, ADI tags can
84+
not be set on read-only mappings.
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86+
87+
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ADI related traps
89+
-----------------
90+
91+
With ADI enabled, following new traps may occur:
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93+
Disrupting memory corruption
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95+
When a store accesses a memory localtion that has TTE.mcd=1,
96+
the task is running with ADI enabled (PSTATE.mcde=1), and the ADI
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tag in the address used (bits 63:60) does not match the tag set on
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the corresponding cacheline, a memory corruption trap occurs. By
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default, it is a disrupting trap and is sent to the hypervisor
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first. Hypervisor creates a sun4v error report and sends a
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resumable error (TT=0x7e) trap to the kernel. The kernel sends
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a SIGSEGV to the task that resulted in this trap with the following
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info:
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siginfo.si_signo = SIGSEGV;
106+
siginfo.errno = 0;
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siginfo.si_code = SEGV_ADIDERR;
108+
siginfo.si_addr = addr; /* PC where first mismatch occurred */
109+
siginfo.si_trapno = 0;
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111+
112+
Precise memory corruption
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When a store accesses a memory location that has TTE.mcd=1,
115+
the task is running with ADI enabled (PSTATE.mcde=1), and the ADI
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tag in the address used (bits 63:60) does not match the tag set on
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the corresponding cacheline, a memory corruption trap occurs. If
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MCD precise exception is enabled (MCDPERR=1), a precise
119+
exception is sent to the kernel with TT=0x1a. The kernel sends
120+
a SIGSEGV to the task that resulted in this trap with the following
121+
info:
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123+
siginfo.si_signo = SIGSEGV;
124+
siginfo.errno = 0;
125+
siginfo.si_code = SEGV_ADIPERR;
126+
siginfo.si_addr = addr; /* address that caused trap */
127+
siginfo.si_trapno = 0;
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129+
NOTE: ADI tag mismatch on a load always results in precise trap.
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131+
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MCD disabled
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134+
When a task has not enabled ADI and attempts to set ADI version
135+
on a memory address, processor sends an MCD disabled trap. This
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trap is handled by hypervisor first and the hypervisor vectors this
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trap through to the kernel as Data Access Exception trap with
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fault type set to 0xa (invalid ASI). When this occurs, the kernel
139+
sends the task SIGSEGV signal with following info:
140+
141+
siginfo.si_signo = SIGSEGV;
142+
siginfo.errno = 0;
143+
siginfo.si_code = SEGV_ACCADI;
144+
siginfo.si_addr = addr; /* address that caused trap */
145+
siginfo.si_trapno = 0;
146+
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148+
Sample program to use ADI
149+
-------------------------
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151+
Following sample program is meant to illustrate how to use the ADI
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functionality.
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154+
#include <unistd.h>
155+
#include <stdio.h>
156+
#include <stdlib.h>
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#include <elf.h>
158+
#include <sys/ipc.h>
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#include <sys/shm.h>
160+
#include <sys/mman.h>
161+
#include <asm/asi.h>
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163+
#ifndef AT_ADI_BLKSZ
164+
#define AT_ADI_BLKSZ 48
165+
#endif
166+
#ifndef AT_ADI_NBITS
167+
#define AT_ADI_NBITS 49
168+
#endif
169+
170+
#ifndef PROT_ADI
171+
#define PROT_ADI 0x10
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#endif
173+
174+
#define BUFFER_SIZE 32*1024*1024UL
175+
176+
main(int argc, char* argv[], char* envp[])
177+
{
178+
unsigned long i, mcde, adi_blksz, adi_nbits;
179+
char *shmaddr, *tmp_addr, *end, *veraddr, *clraddr;
180+
int shmid, version;
181+
Elf64_auxv_t *auxv;
182+
183+
adi_blksz = 0;
184+
185+
while(*envp++ != NULL);
186+
for (auxv = (Elf64_auxv_t *)envp; auxv->a_type != AT_NULL; auxv++) {
187+
switch (auxv->a_type) {
188+
case AT_ADI_BLKSZ:
189+
adi_blksz = auxv->a_un.a_val;
190+
break;
191+
case AT_ADI_NBITS:
192+
adi_nbits = auxv->a_un.a_val;
193+
break;
194+
}
195+
}
196+
if (adi_blksz == 0) {
197+
fprintf(stderr, "Oops! ADI is not supported\n");
198+
exit(1);
199+
}
200+
201+
printf("ADI capabilities:\n");
202+
printf("\tBlock size = %ld\n", adi_blksz);
203+
printf("\tNumber of bits = %ld\n", adi_nbits);
204+
205+
if ((shmid = shmget(2, BUFFER_SIZE,
206+
IPC_CREAT | SHM_R | SHM_W)) < 0) {
207+
perror("shmget failed");
208+
exit(1);
209+
}
210+
211+
shmaddr = shmat(shmid, NULL, 0);
212+
if (shmaddr == (char *)-1) {
213+
perror("shm attach failed");
214+
shmctl(shmid, IPC_RMID, NULL);
215+
exit(1);
216+
}
217+
218+
if (mprotect(shmaddr, BUFFER_SIZE, PROT_READ|PROT_WRITE|PROT_ADI)) {
219+
perror("mprotect failed");
220+
goto err_out;
221+
}
222+
223+
/* Set the ADI version tag on the shm segment
224+
*/
225+
version = 10;
226+
tmp_addr = shmaddr;
227+
end = shmaddr + BUFFER_SIZE;
228+
while (tmp_addr < end) {
229+
asm volatile(
230+
"stxa %1, [%0]0x90\n\t"
231+
:
232+
: "r" (tmp_addr), "r" (version));
233+
tmp_addr += adi_blksz;
234+
}
235+
asm volatile("membar #Sync\n\t");
236+
237+
/* Create a versioned address from the normal address by placing
238+
* version tag in the upper adi_nbits bits
239+
*/
240+
tmp_addr = (void *) ((unsigned long)shmaddr << adi_nbits);
241+
tmp_addr = (void *) ((unsigned long)tmp_addr >> adi_nbits);
242+
veraddr = (void *) (((unsigned long)version << (64-adi_nbits))
243+
| (unsigned long)tmp_addr);
244+
245+
printf("Starting the writes:\n");
246+
for (i = 0; i < BUFFER_SIZE; i++) {
247+
veraddr[i] = (char)(i);
248+
if (!(i % (1024 * 1024)))
249+
printf(".");
250+
}
251+
printf("\n");
252+
253+
printf("Verifying data...");
254+
fflush(stdout);
255+
for (i = 0; i < BUFFER_SIZE; i++)
256+
if (veraddr[i] != (char)i)
257+
printf("\nIndex %lu mismatched\n", i);
258+
printf("Done.\n");
259+
260+
/* Disable ADI and clean up
261+
*/
262+
if (mprotect(shmaddr, BUFFER_SIZE, PROT_READ|PROT_WRITE)) {
263+
perror("mprotect failed");
264+
goto err_out;
265+
}
266+
267+
if (shmdt((const void *)shmaddr) != 0)
268+
perror("Detach failure");
269+
shmctl(shmid, IPC_RMID, NULL);
270+
271+
exit(0);
272+
273+
err_out:
274+
if (shmdt((const void *)shmaddr) != 0)
275+
perror("Detach failure");
276+
shmctl(shmid, IPC_RMID, NULL);
277+
exit(1);
278+
}

arch/powerpc/include/asm/mman.h

Lines changed: 2 additions & 2 deletions
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@@ -43,15 +43,15 @@ static inline pgprot_t arch_vm_get_page_prot(unsigned long vm_flags)
4343
}
4444
#define arch_vm_get_page_prot(vm_flags) arch_vm_get_page_prot(vm_flags)
4545

46-
static inline bool arch_validate_prot(unsigned long prot)
46+
static inline bool arch_validate_prot(unsigned long prot, unsigned long addr)
4747
{
4848
if (prot & ~(PROT_READ | PROT_WRITE | PROT_EXEC | PROT_SEM | PROT_SAO))
4949
return false;
5050
if ((prot & PROT_SAO) && !cpu_has_feature(CPU_FTR_SAO))
5151
return false;
5252
return true;
5353
}
54-
#define arch_validate_prot(prot) arch_validate_prot(prot)
54+
#define arch_validate_prot arch_validate_prot
5555

5656
#endif /* CONFIG_PPC64 */
5757
#endif /* _ASM_POWERPC_MMAN_H */

arch/powerpc/kernel/syscalls.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -48,7 +48,7 @@ static inline long do_mmap2(unsigned long addr, size_t len,
4848
{
4949
long ret = -EINVAL;
5050

51-
if (!arch_validate_prot(prot))
51+
if (!arch_validate_prot(prot, addr))
5252
goto out;
5353

5454
if (shift) {

arch/sparc/include/asm/adi.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,6 @@
1+
#ifndef ___ASM_SPARC_ADI_H
2+
#define ___ASM_SPARC_ADI_H
3+
#if defined(__sparc__) && defined(__arch64__)
4+
#include <asm/adi_64.h>
5+
#endif
6+
#endif

arch/sparc/include/asm/adi_64.h

Lines changed: 47 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,47 @@
1+
/* adi_64.h: ADI related data structures
2+
*
3+
* Copyright (c) 2016 Oracle and/or its affiliates. All rights reserved.
4+
* Author: Khalid Aziz ([email protected])
5+
*
6+
* This work is licensed under the terms of the GNU GPL, version 2.
7+
*/
8+
#ifndef __ASM_SPARC64_ADI_H
9+
#define __ASM_SPARC64_ADI_H
10+
11+
#include <linux/types.h>
12+
13+
#ifndef __ASSEMBLY__
14+
15+
struct adi_caps {
16+
__u64 blksz;
17+
__u64 nbits;
18+
__u64 ue_on_adi;
19+
};
20+
21+
struct adi_config {
22+
bool enabled;
23+
struct adi_caps caps;
24+
};
25+
26+
extern struct adi_config adi_state;
27+
28+
extern void mdesc_adi_init(void);
29+
30+
static inline bool adi_capable(void)
31+
{
32+
return adi_state.enabled;
33+
}
34+
35+
static inline unsigned long adi_blksize(void)
36+
{
37+
return adi_state.caps.blksz;
38+
}
39+
40+
static inline unsigned long adi_nbits(void)
41+
{
42+
return adi_state.caps.nbits;
43+
}
44+
45+
#endif /* __ASSEMBLY__ */
46+
47+
#endif /* !(__ASM_SPARC64_ADI_H) */

arch/sparc/include/asm/atomic_64.h

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -83,7 +83,11 @@ ATOMIC_OPS(xor)
8383
#define atomic64_add_negative(i, v) (atomic64_add_return(i, v) < 0)
8484

8585
#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
86-
#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
86+
87+
static inline int atomic_xchg(atomic_t *v, int new)
88+
{
89+
return xchg(&v->counter, new);
90+
}
8791

8892
static inline int __atomic_add_unless(atomic_t *v, int a, int u)
8993
{

arch/sparc/include/asm/elf_64.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@
1010
#include <asm/processor.h>
1111
#include <asm/extable_64.h>
1212
#include <asm/spitfire.h>
13+
#include <asm/adi.h>
1314

1415
/*
1516
* Sparc section types
@@ -215,9 +216,13 @@ extern unsigned int vdso_enabled;
215216

216217
#define ARCH_DLINFO \
217218
do { \
219+
extern struct adi_config adi_state; \
218220
if (vdso_enabled) \
219221
NEW_AUX_ENT(AT_SYSINFO_EHDR, \
220222
(unsigned long)current->mm->context.vdso); \
223+
NEW_AUX_ENT(AT_ADI_BLKSZ, adi_state.caps.blksz); \
224+
NEW_AUX_ENT(AT_ADI_NBITS, adi_state.caps.nbits); \
225+
NEW_AUX_ENT(AT_ADI_UEONADI, adi_state.caps.ue_on_adi); \
221226
} while (0)
222227

223228
struct linux_binprm;

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