@@ -126,8 +126,7 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
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* isn't free.
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*/
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#ifdef CONFIG_DEBUG_VM
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- if (WARN_ON_ONCE (__read_cr3 () !=
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- (__sme_pa (real_prev -> pgd ) | prev_asid ))) {
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+ if (WARN_ON_ONCE (__read_cr3 () != build_cr3 (real_prev , prev_asid ))) {
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/*
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* If we were to BUG here, we'd be very likely to kill
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* the system so hard that we don't see the call trace.
@@ -172,7 +171,7 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
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*/
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this_cpu_write (cpu_tlbstate .ctxs [prev_asid ].tlb_gen ,
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next_tlb_gen );
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- write_cr3 (__sme_pa (next -> pgd ) | prev_asid );
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+ write_cr3 (build_cr3 (next , prev_asid ) );
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trace_tlb_flush (TLB_FLUSH_ON_TASK_SWITCH ,
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TLB_FLUSH_ALL );
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}
@@ -216,12 +215,12 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
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if (need_flush ) {
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this_cpu_write (cpu_tlbstate .ctxs [new_asid ].ctx_id , next -> context .ctx_id );
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this_cpu_write (cpu_tlbstate .ctxs [new_asid ].tlb_gen , next_tlb_gen );
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- write_cr3 (__sme_pa (next -> pgd ) | new_asid );
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+ write_cr3 (build_cr3 (next , new_asid ) );
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trace_tlb_flush (TLB_FLUSH_ON_TASK_SWITCH ,
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TLB_FLUSH_ALL );
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} else {
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/* The new ASID is already up to date. */
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- write_cr3 (__sme_pa (next -> pgd ) | new_asid | CR3_NOFLUSH );
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+ write_cr3 (build_cr3_noflush (next , new_asid ) );
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trace_tlb_flush (TLB_FLUSH_ON_TASK_SWITCH , 0 );
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}
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@@ -265,7 +264,7 @@ void initialize_tlbstate_and_flush(void)
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!(cr4_read_shadow () & X86_CR4_PCIDE ));
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/* Force ASID 0 and force a TLB flush. */
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- write_cr3 (cr3 & ~ CR3_PCID_MASK );
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+ write_cr3 (build_cr3 ( mm , 0 ) );
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/* Reinitialize tlbstate. */
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this_cpu_write (cpu_tlbstate .loaded_mm_asid , 0 );
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