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npigginmpe
npiggin
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powerpc/64s: Remove POWER4 support
POWER4 has been broken since at least the change 49d09bf ("powerpc/64s: Optimise MSR handling in exception handling"), which requires mtmsrd L=1 support. This was introduced in ISA v2.01, and POWER4 supports ISA v2.00. Signed-off-by: Nicholas Piggin <[email protected]> Signed-off-by: Michael Ellerman <[email protected]>
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10 files changed

+18
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lines changed

‎arch/powerpc/Makefile

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -146,8 +146,8 @@ CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 $(MULTIPLEWORD)
146146
CFLAGS-$(CONFIG_PPC32) += $(call cc-option,-mno-readonly-in-sdata)
147147

148148
ifeq ($(CONFIG_PPC_BOOK3S_64),y)
149-
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,-mtune=power4)
150-
CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=power4
149+
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,$(call cc-option,-mtune=power5))
150+
CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mcpu=power5,-mcpu=power4)
151151
else
152152
CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=powerpc64
153153
endif
@@ -168,7 +168,6 @@ ifdef CONFIG_MPROFILE_KERNEL
168168
endif
169169

170170
CFLAGS-$(CONFIG_CELL_CPU) += $(call cc-option,-mcpu=cell)
171-
CFLAGS-$(CONFIG_POWER4_CPU) += $(call cc-option,-mcpu=power4)
172171
CFLAGS-$(CONFIG_POWER5_CPU) += $(call cc-option,-mcpu=power5)
173172
CFLAGS-$(CONFIG_POWER6_CPU) += $(call cc-option,-mcpu=power6)
174173
CFLAGS-$(CONFIG_POWER7_CPU) += $(call cc-option,-mcpu=power7)

‎arch/powerpc/include/asm/cputable.h

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -413,10 +413,6 @@ static inline void cpu_feature_keys_init(void) { }
413413
#define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)
414414

415415
/* 64-bit CPUs */
416-
#define CPU_FTRS_POWER4 (CPU_FTR_LWSYNC | \
417-
CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
418-
CPU_FTR_MMCRA | CPU_FTR_CP_USE_DCBTZ | \
419-
CPU_FTR_STCX_CHECKS_ADDRESS)
420416
#define CPU_FTRS_PPC970 (CPU_FTR_LWSYNC | \
421417
CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
422418
CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA | \
@@ -488,7 +484,7 @@ static inline void cpu_feature_keys_init(void) { }
488484
#define CPU_FTRS_POSSIBLE (CPU_FTRS_E6500 | CPU_FTRS_E5500)
489485
#else
490486
#define CPU_FTRS_POSSIBLE \
491-
(CPU_FTRS_POWER4 | CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | \
487+
(CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | \
492488
CPU_FTRS_POWER6 | CPU_FTRS_POWER7 | CPU_FTRS_POWER8E | \
493489
CPU_FTRS_POWER8 | CPU_FTRS_POWER8_DD1 | CPU_FTRS_CELL | \
494490
CPU_FTRS_PA6T | CPU_FTR_VSX_COMP | CPU_FTR_ALTIVEC_COMP | \
@@ -541,7 +537,7 @@ enum {
541537
#define CPU_FTRS_ALWAYS (CPU_FTRS_E6500 & CPU_FTRS_E5500)
542538
#else
543539
#define CPU_FTRS_ALWAYS \
544-
(CPU_FTRS_POWER4 & CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & \
540+
(CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & \
545541
CPU_FTRS_POWER6 & CPU_FTRS_POWER7 & CPU_FTRS_CELL & \
546542
CPU_FTRS_PA6T & CPU_FTRS_POWER8 & CPU_FTRS_POWER8E & \
547543
CPU_FTRS_POWER8_DD1 & ~CPU_FTR_HVMODE & CPU_FTRS_POSSIBLE & \

‎arch/powerpc/include/asm/mmu.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -111,9 +111,9 @@
111111
/* MMU feature bit sets for various CPUs */
112112
#define MMU_FTRS_DEFAULT_HPTE_ARCH_V2 \
113113
MMU_FTR_HPTE_TABLE | MMU_FTR_PPCAS_ARCH_V2
114-
#define MMU_FTRS_POWER4 MMU_FTRS_DEFAULT_HPTE_ARCH_V2
115-
#define MMU_FTRS_PPC970 MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA
116-
#define MMU_FTRS_POWER5 MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE
114+
#define MMU_FTRS_POWER MMU_FTRS_DEFAULT_HPTE_ARCH_V2
115+
#define MMU_FTRS_PPC970 MMU_FTRS_POWER | MMU_FTR_TLBIE_CROP_VA
116+
#define MMU_FTRS_POWER5 MMU_FTRS_POWER | MMU_FTR_LOCKLESS_TLBIE
117117
#define MMU_FTRS_POWER6 MMU_FTRS_POWER5 | MMU_FTR_KERNEL_RO | MMU_FTR_68_BIT_VA
118118
#define MMU_FTRS_POWER7 MMU_FTRS_POWER6
119119
#define MMU_FTRS_POWER8 MMU_FTRS_POWER6

‎arch/powerpc/kernel/cputable.c

Lines changed: 3 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -133,36 +133,6 @@ extern void __restore_cpu_e6500(void);
133133

134134
static struct cpu_spec __initdata cpu_specs[] = {
135135
#ifdef CONFIG_PPC_BOOK3S_64
136-
{ /* Power4 */
137-
.pvr_mask = 0xffff0000,
138-
.pvr_value = 0x00350000,
139-
.cpu_name = "POWER4 (gp)",
140-
.cpu_features = CPU_FTRS_POWER4,
141-
.cpu_user_features = COMMON_USER_POWER4,
142-
.mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA,
143-
.icache_bsize = 128,
144-
.dcache_bsize = 128,
145-
.num_pmcs = 8,
146-
.pmc_type = PPC_PMC_IBM,
147-
.oprofile_cpu_type = "ppc64/power4",
148-
.oprofile_type = PPC_OPROFILE_POWER4,
149-
.platform = "power4",
150-
},
151-
{ /* Power4+ */
152-
.pvr_mask = 0xffff0000,
153-
.pvr_value = 0x00380000,
154-
.cpu_name = "POWER4+ (gq)",
155-
.cpu_features = CPU_FTRS_POWER4,
156-
.cpu_user_features = COMMON_USER_POWER4,
157-
.mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA,
158-
.icache_bsize = 128,
159-
.dcache_bsize = 128,
160-
.num_pmcs = 8,
161-
.pmc_type = PPC_PMC_IBM,
162-
.oprofile_cpu_type = "ppc64/power4",
163-
.oprofile_type = PPC_OPROFILE_POWER4,
164-
.platform = "power4",
165-
},
166136
{ /* PPC970 */
167137
.pvr_mask = 0xffff0000,
168138
.pvr_value = 0x00390000,
@@ -628,15 +598,15 @@ static struct cpu_spec __initdata cpu_specs[] = {
628598
{ /* default match */
629599
.pvr_mask = 0x00000000,
630600
.pvr_value = 0x00000000,
631-
.cpu_name = "POWER4 (compatible)",
601+
.cpu_name = "POWER5 (compatible)",
632602
.cpu_features = CPU_FTRS_COMPATIBLE,
633603
.cpu_user_features = COMMON_USER_PPC64,
634-
.mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
604+
.mmu_features = MMU_FTRS_POWER,
635605
.icache_bsize = 128,
636606
.dcache_bsize = 128,
637607
.num_pmcs = 6,
638608
.pmc_type = PPC_PMC_IBM,
639-
.platform = "power4",
609+
.platform = "power5",
640610
}
641611
#endif /* CONFIG_PPC_BOOK3S_64 */
642612

‎arch/powerpc/kernel/prom_init.c

Lines changed: 1 addition & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1810,16 +1810,8 @@ static void __init prom_initialize_tce_table(void)
18101810
* size to 4 MB. This is enough to map 2GB of PCI DMA space.
18111811
* By doing this, we avoid the pitfalls of trying to DMA to
18121812
* MMIO space and the DMA alias hole.
1813-
*
1814-
* On POWER4, firmware sets the TCE region by assuming
1815-
* each TCE table is 8MB. Using this memory for anything
1816-
* else will impact performance, so we always allocate 8MB.
1817-
* Anton
18181813
*/
1819-
if (pvr_version_is(PVR_POWER4) || pvr_version_is(PVR_POWER4p))
1820-
minsize = 8UL << 20;
1821-
else
1822-
minsize = 4UL << 20;
1814+
minsize = 4UL << 20;
18231815

18241816
/* Align to the greater of the align or size */
18251817
align = max(minalign, minsize);

‎arch/powerpc/kvm/emulate.c

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -45,12 +45,6 @@ void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
4545
#ifdef CONFIG_PPC_BOOK3S
4646
/* mtdec lowers the interrupt line when positive. */
4747
kvmppc_core_dequeue_dec(vcpu);
48-
49-
/* POWER4+ triggers a dec interrupt if the value is < 0 */
50-
if (vcpu->arch.dec & 0x80000000) {
51-
kvmppc_core_queue_dec(vcpu);
52-
return;
53-
}
5448
#endif
5549

5650
#ifdef CONFIG_BOOKE

‎arch/powerpc/mm/hash_utils_64.c

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -132,9 +132,10 @@ EXPORT_SYMBOL(mmu_hash_ops);
132132
* is provided by the firmware.
133133
*/
134134

135-
/* Pre-POWER4 CPUs (4k pages only)
135+
/*
136+
* Fallback (4k pages only)
136137
*/
137-
static struct mmu_psize_def mmu_psize_defaults_old[] = {
138+
static struct mmu_psize_def mmu_psize_defaults[] = {
138139
[MMU_PAGE_4K] = {
139140
.shift = 12,
140141
.sllp = 0,
@@ -554,8 +555,8 @@ static void __init htab_scan_page_sizes(void)
554555
mmu_psize_set_default_penc();
555556

556557
/* Default to 4K pages only */
557-
memcpy(mmu_psize_defs, mmu_psize_defaults_old,
558-
sizeof(mmu_psize_defaults_old));
558+
memcpy(mmu_psize_defs, mmu_psize_defaults,
559+
sizeof(mmu_psize_defaults));
559560

560561
/*
561562
* Try to find the available page sizes in the device-tree

‎arch/powerpc/perf/Makefile

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@ subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
44
obj-$(CONFIG_PERF_EVENTS) += callchain.o perf_regs.o
55

66
obj-$(CONFIG_PPC_PERF_CTRS) += core-book3s.o bhrb.o
7-
obj64-$(CONFIG_PPC_PERF_CTRS) += power4-pmu.o ppc970-pmu.o power5-pmu.o \
7+
obj64-$(CONFIG_PPC_PERF_CTRS) += ppc970-pmu.o power5-pmu.o \
88
power5+-pmu.o power6-pmu.o power7-pmu.o \
99
isa207-common.o power8-pmu.o power9-pmu.o
1010
obj32-$(CONFIG_PPC_PERF_CTRS) += mpc7450-pmu.o

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