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Merge branch 'drm-next-4.14' of git://people.freedesktop.org/~agd5f/linux into drm-next
A few fixes for 4.14. Nothing too major.
2 parents 7846b12 + 3d138c1 commit 47e0cd6

28 files changed

+236
-160
lines changed

‎drivers/gpu/drm/amd/amdgpu/amdgpu.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -76,7 +76,7 @@
7676
extern int amdgpu_modeset;
7777
extern int amdgpu_vram_limit;
7878
extern int amdgpu_vis_vram_limit;
79-
extern unsigned amdgpu_gart_size;
79+
extern int amdgpu_gart_size;
8080
extern int amdgpu_gtt_size;
8181
extern int amdgpu_moverate;
8282
extern int amdgpu_benchmarking;

‎drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -155,7 +155,6 @@ static const struct kfd2kgd_calls kfd2kgd = {
155155
struct kfd2kgd_calls *amdgpu_amdkfd_gfx_8_0_get_functions(void)
156156
{
157157
return (struct kfd2kgd_calls *)&kfd2kgd;
158-
return (struct kfd2kgd_calls *)&kfd2kgd;
159158
}
160159

161160
static inline struct amdgpu_device *get_amdgpu_device(struct kgd_dev *kgd)

‎drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1079,6 +1079,9 @@ static int amdgpu_cs_process_syncobj_out_dep(struct amdgpu_cs_parser *p,
10791079
GFP_KERNEL);
10801080
p->num_post_dep_syncobjs = 0;
10811081

1082+
if (!p->post_dep_syncobjs)
1083+
return -ENOMEM;
1084+
10821085
for (i = 0; i < num_deps; ++i) {
10831086
p->post_dep_syncobjs[i] = drm_syncobj_find(p->filp, deps[i].handle);
10841087
if (!p->post_dep_syncobjs[i])
@@ -1150,7 +1153,6 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
11501153
cs->out.handle = amdgpu_ctx_add_fence(p->ctx, ring, p->fence);
11511154
job->uf_sequence = cs->out.handle;
11521155
amdgpu_job_free_resources(job);
1153-
amdgpu_cs_parser_fini(p, 0, true);
11541156

11551157
trace_amdgpu_cs_ioctl(job);
11561158
amd_sched_entity_push_job(&job->base);
@@ -1208,10 +1210,7 @@ int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
12081210
goto out;
12091211

12101212
r = amdgpu_cs_submit(&parser, cs);
1211-
if (r)
1212-
goto out;
12131213

1214-
return 0;
12151214
out:
12161215
amdgpu_cs_parser_fini(&parser, r, reserved_buffers);
12171216
return r;

‎drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

Lines changed: 2 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1062,11 +1062,11 @@ static void amdgpu_check_arguments(struct amdgpu_device *adev)
10621062
amdgpu_sched_jobs = roundup_pow_of_two(amdgpu_sched_jobs);
10631063
}
10641064

1065-
if (amdgpu_gart_size < 32) {
1065+
if (amdgpu_gart_size != -1 && amdgpu_gart_size < 32) {
10661066
/* gart size must be greater or equal to 32M */
10671067
dev_warn(adev->dev, "gart size (%d) too small\n",
10681068
amdgpu_gart_size);
1069-
amdgpu_gart_size = 32;
1069+
amdgpu_gart_size = -1;
10701070
}
10711071

10721072
if (amdgpu_gtt_size != -1 && amdgpu_gtt_size < 32) {
@@ -2622,12 +2622,6 @@ static int amdgpu_recover_vram_from_shadow(struct amdgpu_device *adev,
26222622
goto err;
26232623
}
26242624

2625-
r = amdgpu_ttm_bind(&bo->shadow->tbo, &bo->shadow->tbo.mem);
2626-
if (r) {
2627-
DRM_ERROR("%p bind failed\n", bo->shadow);
2628-
goto err;
2629-
}
2630-
26312625
r = amdgpu_bo_restore_from_shadow(adev, ring, bo,
26322626
NULL, fence, true);
26332627
if (r) {

‎drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -76,7 +76,7 @@
7676

7777
int amdgpu_vram_limit = 0;
7878
int amdgpu_vis_vram_limit = 0;
79-
unsigned amdgpu_gart_size = 256;
79+
int amdgpu_gart_size = -1; /* auto */
8080
int amdgpu_gtt_size = -1; /* auto */
8181
int amdgpu_moverate = -1; /* auto */
8282
int amdgpu_benchmarking = 0;
@@ -128,7 +128,7 @@ module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
128128
MODULE_PARM_DESC(vis_vramlimit, "Restrict visible VRAM for testing, in megabytes");
129129
module_param_named(vis_vramlimit, amdgpu_vis_vram_limit, int, 0444);
130130

131-
MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc.)");
131+
MODULE_PARM_DESC(gartsize, "Size of GART to setup in megabytes (32, 64, etc., -1=auto)");
132132
module_param_named(gartsize, amdgpu_gart_size, uint, 0600);
133133

134134
MODULE_PARM_DESC(gttsize, "Size of the GTT domain in megabytes (-1 = auto)");

‎drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c

Lines changed: 0 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -56,18 +56,6 @@
5656
* Common GART table functions.
5757
*/
5858

59-
/**
60-
* amdgpu_gart_set_defaults - set the default gart_size
61-
*
62-
* @adev: amdgpu_device pointer
63-
*
64-
* Set the default gart_size based on parameters and available VRAM.
65-
*/
66-
void amdgpu_gart_set_defaults(struct amdgpu_device *adev)
67-
{
68-
adev->mc.gart_size = (uint64_t)amdgpu_gart_size << 20;
69-
}
70-
7159
/**
7260
* amdgpu_gart_table_ram_alloc - allocate system ram for gart page table
7361
*

‎drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -56,7 +56,6 @@ struct amdgpu_gart {
5656
const struct amdgpu_gart_funcs *gart_funcs;
5757
};
5858

59-
void amdgpu_gart_set_defaults(struct amdgpu_device *adev);
6059
int amdgpu_gart_table_ram_alloc(struct amdgpu_device *adev);
6160
void amdgpu_gart_table_ram_free(struct amdgpu_device *adev);
6261
int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev);

‎drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c

Lines changed: 5 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -108,10 +108,10 @@ bool amdgpu_gtt_mgr_is_allocated(struct ttm_mem_reg *mem)
108108
*
109109
* Allocate the address space for a node.
110110
*/
111-
int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
112-
struct ttm_buffer_object *tbo,
113-
const struct ttm_place *place,
114-
struct ttm_mem_reg *mem)
111+
static int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
112+
struct ttm_buffer_object *tbo,
113+
const struct ttm_place *place,
114+
struct ttm_mem_reg *mem)
115115
{
116116
struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev);
117117
struct amdgpu_gtt_mgr *mgr = man->priv;
@@ -143,12 +143,8 @@ int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
143143
fpfn, lpfn, mode);
144144
spin_unlock(&mgr->lock);
145145

146-
if (!r) {
146+
if (!r)
147147
mem->start = node->start;
148-
if (&tbo->mem == mem)
149-
tbo->offset = (tbo->mem.start << PAGE_SHIFT) +
150-
tbo->bdev->man[tbo->mem.mem_type].gpu_offset;
151-
}
152148

153149
return r;
154150
}

‎drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -221,8 +221,9 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
221221

222222
spin_lock_init(&adev->irq.lock);
223223

224-
/* Disable vblank irqs aggressively for power-saving */
225-
adev->ddev->vblank_disable_immediate = true;
224+
if (!adev->enable_virtual_display)
225+
/* Disable vblank irqs aggressively for power-saving */
226+
adev->ddev->vblank_disable_immediate = true;
226227

227228
r = drm_vblank_init(adev->ddev, adev->mode_info.num_crtc);
228229
if (r) {

‎drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

Lines changed: 23 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -91,7 +91,10 @@ static void amdgpu_ttm_placement_init(struct amdgpu_device *adev,
9191

9292
if (domain & AMDGPU_GEM_DOMAIN_GTT) {
9393
places[c].fpfn = 0;
94-
places[c].lpfn = 0;
94+
if (flags & AMDGPU_GEM_CREATE_SHADOW)
95+
places[c].lpfn = adev->mc.gart_size >> PAGE_SHIFT;
96+
else
97+
places[c].lpfn = 0;
9598
places[c].flags = TTM_PL_FLAG_TT;
9699
if (flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC)
97100
places[c].flags |= TTM_PL_FLAG_WC |
@@ -446,17 +449,16 @@ static int amdgpu_bo_create_shadow(struct amdgpu_device *adev,
446449
if (bo->shadow)
447450
return 0;
448451

449-
bo->flags |= AMDGPU_GEM_CREATE_SHADOW;
450-
memset(&placements, 0,
451-
(AMDGPU_GEM_DOMAIN_MAX + 1) * sizeof(struct ttm_place));
452-
453-
amdgpu_ttm_placement_init(adev, &placement,
454-
placements, AMDGPU_GEM_DOMAIN_GTT,
455-
AMDGPU_GEM_CREATE_CPU_GTT_USWC);
452+
memset(&placements, 0, sizeof(placements));
453+
amdgpu_ttm_placement_init(adev, &placement, placements,
454+
AMDGPU_GEM_DOMAIN_GTT,
455+
AMDGPU_GEM_CREATE_CPU_GTT_USWC |
456+
AMDGPU_GEM_CREATE_SHADOW);
456457

457458
r = amdgpu_bo_create_restricted(adev, size, byte_align, true,
458459
AMDGPU_GEM_DOMAIN_GTT,
459-
AMDGPU_GEM_CREATE_CPU_GTT_USWC,
460+
AMDGPU_GEM_CREATE_CPU_GTT_USWC |
461+
AMDGPU_GEM_CREATE_SHADOW,
460462
NULL, &placement,
461463
bo->tbo.resv,
462464
0,
@@ -484,30 +486,28 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
484486
{
485487
struct ttm_placement placement = {0};
486488
struct ttm_place placements[AMDGPU_GEM_DOMAIN_MAX + 1];
489+
uint64_t parent_flags = flags & ~AMDGPU_GEM_CREATE_SHADOW;
487490
int r;
488491

489-
memset(&placements, 0,
490-
(AMDGPU_GEM_DOMAIN_MAX + 1) * sizeof(struct ttm_place));
492+
memset(&placements, 0, sizeof(placements));
493+
amdgpu_ttm_placement_init(adev, &placement, placements,
494+
domain, parent_flags);
491495

492-
amdgpu_ttm_placement_init(adev, &placement,
493-
placements, domain, flags);
494-
495-
r = amdgpu_bo_create_restricted(adev, size, byte_align, kernel,
496-
domain, flags, sg, &placement,
497-
resv, init_value, bo_ptr);
496+
r = amdgpu_bo_create_restricted(adev, size, byte_align, kernel, domain,
497+
parent_flags, sg, &placement, resv,
498+
init_value, bo_ptr);
498499
if (r)
499500
return r;
500501

501-
if (amdgpu_need_backup(adev) && (flags & AMDGPU_GEM_CREATE_SHADOW)) {
502-
if (!resv) {
503-
r = ww_mutex_lock(&(*bo_ptr)->tbo.resv->lock, NULL);
504-
WARN_ON(r != 0);
505-
}
502+
if ((flags & AMDGPU_GEM_CREATE_SHADOW) && amdgpu_need_backup(adev)) {
503+
if (!resv)
504+
WARN_ON(reservation_object_lock((*bo_ptr)->tbo.resv,
505+
NULL));
506506

507507
r = amdgpu_bo_create_shadow(adev, size, byte_align, (*bo_ptr));
508508

509509
if (!resv)
510-
ww_mutex_unlock(&(*bo_ptr)->tbo.resv->lock);
510+
reservation_object_unlock((*bo_ptr)->tbo.resv);
511511

512512
if (r)
513513
amdgpu_bo_unref(bo_ptr);

‎drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

Lines changed: 12 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -170,6 +170,16 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
170170
unsigned irq_type)
171171
{
172172
int r;
173+
int sched_hw_submission = amdgpu_sched_hw_submission;
174+
175+
/* Set the hw submission limit higher for KIQ because
176+
* it's used for a number of gfx/compute tasks by both
177+
* KFD and KGD which may have outstanding fences and
178+
* it doesn't really use the gpu scheduler anyway;
179+
* KIQ tasks get submitted directly to the ring.
180+
*/
181+
if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ)
182+
sched_hw_submission = max(sched_hw_submission, 256);
173183

174184
if (ring->adev == NULL) {
175185
if (adev->num_rings >= AMDGPU_MAX_RINGS)
@@ -178,8 +188,7 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
178188
ring->adev = adev;
179189
ring->idx = adev->num_rings++;
180190
adev->rings[ring->idx] = ring;
181-
r = amdgpu_fence_driver_init_ring(ring,
182-
amdgpu_sched_hw_submission);
191+
r = amdgpu_fence_driver_init_ring(ring, sched_hw_submission);
183192
if (r)
184193
return r;
185194
}
@@ -218,8 +227,7 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
218227
return r;
219228
}
220229

221-
ring->ring_size = roundup_pow_of_two(max_dw * 4 *
222-
amdgpu_sched_hw_submission);
230+
ring->ring_size = roundup_pow_of_two(max_dw * 4 * sched_hw_submission);
223231

224232
ring->buf_mask = (ring->ring_size / 4) - 1;
225233
ring->ptr_mask = ring->funcs->support_64bit_ptrs ?

‎drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

Lines changed: 43 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -761,35 +761,11 @@ static void amdgpu_ttm_tt_unpin_userptr(struct ttm_tt *ttm)
761761
sg_free_table(ttm->sg);
762762
}
763763

764-
static int amdgpu_ttm_do_bind(struct ttm_tt *ttm, struct ttm_mem_reg *mem)
765-
{
766-
struct amdgpu_ttm_tt *gtt = (void *)ttm;
767-
uint64_t flags;
768-
int r;
769-
770-
spin_lock(&gtt->adev->gtt_list_lock);
771-
flags = amdgpu_ttm_tt_pte_flags(gtt->adev, ttm, mem);
772-
gtt->offset = (u64)mem->start << PAGE_SHIFT;
773-
r = amdgpu_gart_bind(gtt->adev, gtt->offset, ttm->num_pages,
774-
ttm->pages, gtt->ttm.dma_address, flags);
775-
776-
if (r) {
777-
DRM_ERROR("failed to bind %lu pages at 0x%08llX\n",
778-
ttm->num_pages, gtt->offset);
779-
goto error_gart_bind;
780-
}
781-
782-
list_add_tail(&gtt->list, &gtt->adev->gtt_list);
783-
error_gart_bind:
784-
spin_unlock(&gtt->adev->gtt_list_lock);
785-
return r;
786-
787-
}
788-
789764
static int amdgpu_ttm_backend_bind(struct ttm_tt *ttm,
790765
struct ttm_mem_reg *bo_mem)
791766
{
792767
struct amdgpu_ttm_tt *gtt = (void*)ttm;
768+
uint64_t flags;
793769
int r = 0;
794770

795771
if (gtt->userptr) {
@@ -809,9 +785,24 @@ static int amdgpu_ttm_backend_bind(struct ttm_tt *ttm,
809785
bo_mem->mem_type == AMDGPU_PL_OA)
810786
return -EINVAL;
811787

812-
if (amdgpu_gtt_mgr_is_allocated(bo_mem))
813-
r = amdgpu_ttm_do_bind(ttm, bo_mem);
788+
if (!amdgpu_gtt_mgr_is_allocated(bo_mem))
789+
return 0;
814790

791+
spin_lock(&gtt->adev->gtt_list_lock);
792+
flags = amdgpu_ttm_tt_pte_flags(gtt->adev, ttm, bo_mem);
793+
gtt->offset = (u64)bo_mem->start << PAGE_SHIFT;
794+
r = amdgpu_gart_bind(gtt->adev, gtt->offset, ttm->num_pages,
795+
ttm->pages, gtt->ttm.dma_address, flags);
796+
797+
if (r) {
798+
DRM_ERROR("failed to bind %lu pages at 0x%08llX\n",
799+
ttm->num_pages, gtt->offset);
800+
goto error_gart_bind;
801+
}
802+
803+
list_add_tail(&gtt->list, &gtt->adev->gtt_list);
804+
error_gart_bind:
805+
spin_unlock(&gtt->adev->gtt_list_lock);
815806
return r;
816807
}
817808

@@ -824,20 +815,39 @@ bool amdgpu_ttm_is_bound(struct ttm_tt *ttm)
824815

825816
int amdgpu_ttm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *bo_mem)
826817
{
818+
struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
827819
struct ttm_tt *ttm = bo->ttm;
820+
struct ttm_mem_reg tmp;
821+
822+
struct ttm_placement placement;
823+
struct ttm_place placements;
828824
int r;
829825

830826
if (!ttm || amdgpu_ttm_is_bound(ttm))
831827
return 0;
832828

833-
r = amdgpu_gtt_mgr_alloc(&bo->bdev->man[TTM_PL_TT], bo,
834-
NULL, bo_mem);
835-
if (r) {
836-
DRM_ERROR("Failed to allocate GTT address space (%d)\n", r);
829+
tmp = bo->mem;
830+
tmp.mm_node = NULL;
831+
placement.num_placement = 1;
832+
placement.placement = &placements;
833+
placement.num_busy_placement = 1;
834+
placement.busy_placement = &placements;
835+
placements.fpfn = 0;
836+
placements.lpfn = adev->mc.gart_size >> PAGE_SHIFT;
837+
placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
838+
839+
r = ttm_bo_mem_space(bo, &placement, &tmp, true, false);
840+
if (unlikely(r))
837841
return r;
838-
}
839842

840-
return amdgpu_ttm_do_bind(ttm, bo_mem);
843+
r = ttm_bo_move_ttm(bo, true, false, &tmp);
844+
if (unlikely(r))
845+
ttm_bo_mem_put(bo, &tmp);
846+
else
847+
bo->offset = (bo->mem.start << PAGE_SHIFT) +
848+
bo->bdev->man[bo->mem.mem_type].gpu_offset;
849+
850+
return r;
841851
}
842852

843853
int amdgpu_ttm_recover_gart(struct amdgpu_device *adev)

‎drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -62,10 +62,6 @@ extern const struct ttm_mem_type_manager_func amdgpu_gtt_mgr_func;
6262
extern const struct ttm_mem_type_manager_func amdgpu_vram_mgr_func;
6363

6464
bool amdgpu_gtt_mgr_is_allocated(struct ttm_mem_reg *mem);
65-
int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
66-
struct ttm_buffer_object *tbo,
67-
const struct ttm_place *place,
68-
struct ttm_mem_reg *mem);
6965
uint64_t amdgpu_gtt_mgr_usage(struct ttm_mem_type_manager *man);
7066

7167
uint64_t amdgpu_vram_mgr_usage(struct ttm_mem_type_manager *man);

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