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Sebastian Andrzej Siewiorlinusw
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gpio: omap: use raw locks for locking
This patch converts gpio_bank.lock from a spin_lock into a raw_spin_lock. The call path is to access this lock is always under a raw_spin_lock, for instance - __setup_irq() holds &desc->lock with irq off + __irq_set_trigger() + omap_gpio_irq_type() - handle_level_irq() (runs with irqs off therefore raw locks) + mask_ack_irq() + omap_gpio_mask_irq() This fixes the obvious backtrace on -RT. However the locking vs context is not and this is not limited to -RT: - omap_gpio_irq_type() is called with IRQ off and has an conditional call to pm_runtime_get_sync() which may sleep. Either it may happen or it may not happen but pm_runtime_get_sync() should not be called with irqs off. - omap_gpio_debounce() is holding the lock with IRQs off. + omap2_set_gpio_debounce() + clk_prepare_enable() + clk_prepare() this one might sleep. The number of users of gpiod_set_debounce() / gpio_set_debounce() looks low but still this is not good. Acked-by: Javier Martinez Canillas <[email protected]> Acked-by: Santosh Shilimkar <[email protected]> Signed-off-by: Sebastian Andrzej Siewior <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
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drivers/gpio/gpio-omap.c

Lines changed: 40 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -57,7 +57,7 @@ struct gpio_bank {
5757
u32 saved_datain;
5858
u32 level_mask;
5959
u32 toggle_mask;
60-
spinlock_t lock;
60+
raw_spinlock_t lock;
6161
struct gpio_chip chip;
6262
struct clk *dbck;
6363
u32 mod_usage;
@@ -498,17 +498,17 @@ static int omap_gpio_irq_type(struct irq_data *d, unsigned type)
498498
if (!BANK_USED(bank))
499499
pm_runtime_get_sync(bank->dev);
500500

501-
spin_lock_irqsave(&bank->lock, flags);
501+
raw_spin_lock_irqsave(&bank->lock, flags);
502502
retval = omap_set_gpio_triggering(bank, offset, type);
503503
if (retval)
504504
goto error;
505505
omap_gpio_init_irq(bank, offset);
506506
if (!omap_gpio_is_input(bank, offset)) {
507-
spin_unlock_irqrestore(&bank->lock, flags);
507+
raw_spin_unlock_irqrestore(&bank->lock, flags);
508508
retval = -EINVAL;
509509
goto error;
510510
}
511-
spin_unlock_irqrestore(&bank->lock, flags);
511+
raw_spin_unlock_irqrestore(&bank->lock, flags);
512512

513513
if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
514514
irq_set_handler_locked(d, handle_level_irq);
@@ -634,14 +634,14 @@ static int omap_set_gpio_wakeup(struct gpio_bank *bank, unsigned offset,
634634
return -EINVAL;
635635
}
636636

637-
spin_lock_irqsave(&bank->lock, flags);
637+
raw_spin_lock_irqsave(&bank->lock, flags);
638638
if (enable)
639639
bank->context.wake_en |= gpio_bit;
640640
else
641641
bank->context.wake_en &= ~gpio_bit;
642642

643643
writel_relaxed(bank->context.wake_en, bank->base + bank->regs->wkup_en);
644-
spin_unlock_irqrestore(&bank->lock, flags);
644+
raw_spin_unlock_irqrestore(&bank->lock, flags);
645645

646646
return 0;
647647
}
@@ -667,10 +667,10 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
667667
if (!BANK_USED(bank))
668668
pm_runtime_get_sync(bank->dev);
669669

670-
spin_lock_irqsave(&bank->lock, flags);
670+
raw_spin_lock_irqsave(&bank->lock, flags);
671671
omap_enable_gpio_module(bank, offset);
672672
bank->mod_usage |= BIT(offset);
673-
spin_unlock_irqrestore(&bank->lock, flags);
673+
raw_spin_unlock_irqrestore(&bank->lock, flags);
674674

675675
return 0;
676676
}
@@ -680,14 +680,14 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
680680
struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
681681
unsigned long flags;
682682

683-
spin_lock_irqsave(&bank->lock, flags);
683+
raw_spin_lock_irqsave(&bank->lock, flags);
684684
bank->mod_usage &= ~(BIT(offset));
685685
if (!LINE_USED(bank->irq_usage, offset)) {
686686
omap_set_gpio_direction(bank, offset, 1);
687687
omap_clear_gpio_debounce(bank, offset);
688688
}
689689
omap_disable_gpio_module(bank, offset);
690-
spin_unlock_irqrestore(&bank->lock, flags);
690+
raw_spin_unlock_irqrestore(&bank->lock, flags);
691691

692692
/*
693693
* If this is the last gpio to be freed in the bank,
@@ -789,7 +789,7 @@ static unsigned int omap_gpio_irq_startup(struct irq_data *d)
789789
if (!BANK_USED(bank))
790790
pm_runtime_get_sync(bank->dev);
791791

792-
spin_lock_irqsave(&bank->lock, flags);
792+
raw_spin_lock_irqsave(&bank->lock, flags);
793793

794794
if (!LINE_USED(bank->mod_usage, offset))
795795
omap_set_gpio_direction(bank, offset, 1);
@@ -798,12 +798,12 @@ static unsigned int omap_gpio_irq_startup(struct irq_data *d)
798798
omap_enable_gpio_module(bank, offset);
799799
bank->irq_usage |= BIT(offset);
800800

801-
spin_unlock_irqrestore(&bank->lock, flags);
801+
raw_spin_unlock_irqrestore(&bank->lock, flags);
802802
omap_gpio_unmask_irq(d);
803803

804804
return 0;
805805
err:
806-
spin_unlock_irqrestore(&bank->lock, flags);
806+
raw_spin_unlock_irqrestore(&bank->lock, flags);
807807
if (!BANK_USED(bank))
808808
pm_runtime_put(bank->dev);
809809
return -EINVAL;
@@ -815,15 +815,15 @@ static void omap_gpio_irq_shutdown(struct irq_data *d)
815815
unsigned long flags;
816816
unsigned offset = d->hwirq;
817817

818-
spin_lock_irqsave(&bank->lock, flags);
818+
raw_spin_lock_irqsave(&bank->lock, flags);
819819
bank->irq_usage &= ~(BIT(offset));
820820
omap_set_gpio_irqenable(bank, offset, 0);
821821
omap_clear_gpio_irqstatus(bank, offset);
822822
omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
823823
if (!LINE_USED(bank->mod_usage, offset))
824824
omap_clear_gpio_debounce(bank, offset);
825825
omap_disable_gpio_module(bank, offset);
826-
spin_unlock_irqrestore(&bank->lock, flags);
826+
raw_spin_unlock_irqrestore(&bank->lock, flags);
827827

828828
/*
829829
* If this is the last IRQ to be freed in the bank,
@@ -847,10 +847,10 @@ static void omap_gpio_mask_irq(struct irq_data *d)
847847
unsigned offset = d->hwirq;
848848
unsigned long flags;
849849

850-
spin_lock_irqsave(&bank->lock, flags);
850+
raw_spin_lock_irqsave(&bank->lock, flags);
851851
omap_set_gpio_irqenable(bank, offset, 0);
852852
omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
853-
spin_unlock_irqrestore(&bank->lock, flags);
853+
raw_spin_unlock_irqrestore(&bank->lock, flags);
854854
}
855855

856856
static void omap_gpio_unmask_irq(struct irq_data *d)
@@ -860,7 +860,7 @@ static void omap_gpio_unmask_irq(struct irq_data *d)
860860
u32 trigger = irqd_get_trigger_type(d);
861861
unsigned long flags;
862862

863-
spin_lock_irqsave(&bank->lock, flags);
863+
raw_spin_lock_irqsave(&bank->lock, flags);
864864
if (trigger)
865865
omap_set_gpio_triggering(bank, offset, trigger);
866866

@@ -872,7 +872,7 @@ static void omap_gpio_unmask_irq(struct irq_data *d)
872872
}
873873

874874
omap_set_gpio_irqenable(bank, offset, 1);
875-
spin_unlock_irqrestore(&bank->lock, flags);
875+
raw_spin_unlock_irqrestore(&bank->lock, flags);
876876
}
877877

878878
/*---------------------------------------------------------------------*/
@@ -885,9 +885,9 @@ static int omap_mpuio_suspend_noirq(struct device *dev)
885885
OMAP_MPUIO_GPIO_MASKIT / bank->stride;
886886
unsigned long flags;
887887

888-
spin_lock_irqsave(&bank->lock, flags);
888+
raw_spin_lock_irqsave(&bank->lock, flags);
889889
writel_relaxed(0xffff & ~bank->context.wake_en, mask_reg);
890-
spin_unlock_irqrestore(&bank->lock, flags);
890+
raw_spin_unlock_irqrestore(&bank->lock, flags);
891891

892892
return 0;
893893
}
@@ -900,9 +900,9 @@ static int omap_mpuio_resume_noirq(struct device *dev)
900900
OMAP_MPUIO_GPIO_MASKIT / bank->stride;
901901
unsigned long flags;
902902

903-
spin_lock_irqsave(&bank->lock, flags);
903+
raw_spin_lock_irqsave(&bank->lock, flags);
904904
writel_relaxed(bank->context.wake_en, mask_reg);
905-
spin_unlock_irqrestore(&bank->lock, flags);
905+
raw_spin_unlock_irqrestore(&bank->lock, flags);
906906

907907
return 0;
908908
}
@@ -948,9 +948,9 @@ static int omap_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
948948

949949
bank = container_of(chip, struct gpio_bank, chip);
950950
reg = bank->base + bank->regs->direction;
951-
spin_lock_irqsave(&bank->lock, flags);
951+
raw_spin_lock_irqsave(&bank->lock, flags);
952952
dir = !!(readl_relaxed(reg) & BIT(offset));
953-
spin_unlock_irqrestore(&bank->lock, flags);
953+
raw_spin_unlock_irqrestore(&bank->lock, flags);
954954
return dir;
955955
}
956956

@@ -960,9 +960,9 @@ static int omap_gpio_input(struct gpio_chip *chip, unsigned offset)
960960
unsigned long flags;
961961

962962
bank = container_of(chip, struct gpio_bank, chip);
963-
spin_lock_irqsave(&bank->lock, flags);
963+
raw_spin_lock_irqsave(&bank->lock, flags);
964964
omap_set_gpio_direction(bank, offset, 1);
965-
spin_unlock_irqrestore(&bank->lock, flags);
965+
raw_spin_unlock_irqrestore(&bank->lock, flags);
966966
return 0;
967967
}
968968

@@ -984,10 +984,10 @@ static int omap_gpio_output(struct gpio_chip *chip, unsigned offset, int value)
984984
unsigned long flags;
985985

986986
bank = container_of(chip, struct gpio_bank, chip);
987-
spin_lock_irqsave(&bank->lock, flags);
987+
raw_spin_lock_irqsave(&bank->lock, flags);
988988
bank->set_dataout(bank, offset, value);
989989
omap_set_gpio_direction(bank, offset, 0);
990-
spin_unlock_irqrestore(&bank->lock, flags);
990+
raw_spin_unlock_irqrestore(&bank->lock, flags);
991991
return 0;
992992
}
993993

@@ -999,9 +999,9 @@ static int omap_gpio_debounce(struct gpio_chip *chip, unsigned offset,
999999

10001000
bank = container_of(chip, struct gpio_bank, chip);
10011001

1002-
spin_lock_irqsave(&bank->lock, flags);
1002+
raw_spin_lock_irqsave(&bank->lock, flags);
10031003
omap2_set_gpio_debounce(bank, offset, debounce);
1004-
spin_unlock_irqrestore(&bank->lock, flags);
1004+
raw_spin_unlock_irqrestore(&bank->lock, flags);
10051005

10061006
return 0;
10071007
}
@@ -1012,9 +1012,9 @@ static void omap_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
10121012
unsigned long flags;
10131013

10141014
bank = container_of(chip, struct gpio_bank, chip);
1015-
spin_lock_irqsave(&bank->lock, flags);
1015+
raw_spin_lock_irqsave(&bank->lock, flags);
10161016
bank->set_dataout(bank, offset, value);
1017-
spin_unlock_irqrestore(&bank->lock, flags);
1017+
raw_spin_unlock_irqrestore(&bank->lock, flags);
10181018
}
10191019

10201020
/*---------------------------------------------------------------------*/
@@ -1210,7 +1210,7 @@ static int omap_gpio_probe(struct platform_device *pdev)
12101210
else
12111211
bank->set_dataout = omap_set_gpio_dataout_mask;
12121212

1213-
spin_lock_init(&bank->lock);
1213+
raw_spin_lock_init(&bank->lock);
12141214

12151215
/* Static mapping, never released */
12161216
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -1268,7 +1268,7 @@ static int omap_gpio_runtime_suspend(struct device *dev)
12681268
unsigned long flags;
12691269
u32 wake_low, wake_hi;
12701270

1271-
spin_lock_irqsave(&bank->lock, flags);
1271+
raw_spin_lock_irqsave(&bank->lock, flags);
12721272

12731273
/*
12741274
* Only edges can generate a wakeup event to the PRCM.
@@ -1321,7 +1321,7 @@ static int omap_gpio_runtime_suspend(struct device *dev)
13211321
bank->get_context_loss_count(bank->dev);
13221322

13231323
omap_gpio_dbck_disable(bank);
1324-
spin_unlock_irqrestore(&bank->lock, flags);
1324+
raw_spin_unlock_irqrestore(&bank->lock, flags);
13251325

13261326
return 0;
13271327
}
@@ -1336,7 +1336,7 @@ static int omap_gpio_runtime_resume(struct device *dev)
13361336
unsigned long flags;
13371337
int c;
13381338

1339-
spin_lock_irqsave(&bank->lock, flags);
1339+
raw_spin_lock_irqsave(&bank->lock, flags);
13401340

13411341
/*
13421342
* On the first resume during the probe, the context has not
@@ -1372,14 +1372,14 @@ static int omap_gpio_runtime_resume(struct device *dev)
13721372
if (c != bank->context_loss_count) {
13731373
omap_gpio_restore_context(bank);
13741374
} else {
1375-
spin_unlock_irqrestore(&bank->lock, flags);
1375+
raw_spin_unlock_irqrestore(&bank->lock, flags);
13761376
return 0;
13771377
}
13781378
}
13791379
}
13801380

13811381
if (!bank->workaround_enabled) {
1382-
spin_unlock_irqrestore(&bank->lock, flags);
1382+
raw_spin_unlock_irqrestore(&bank->lock, flags);
13831383
return 0;
13841384
}
13851385

@@ -1434,7 +1434,7 @@ static int omap_gpio_runtime_resume(struct device *dev)
14341434
}
14351435

14361436
bank->workaround_enabled = false;
1437-
spin_unlock_irqrestore(&bank->lock, flags);
1437+
raw_spin_unlock_irqrestore(&bank->lock, flags);
14381438

14391439
return 0;
14401440
}

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