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| 1 | +/* |
| 2 | + * intel_scu_ipc.c: Driver for the Intel SCU IPC mechanism |
| 3 | + * |
| 4 | + * (C) Copyright 2008-2010 Intel Corporation |
| 5 | + * Author: Sreedhara DS ([email protected]) |
| 6 | + * |
| 7 | + * This program is free software; you can redistribute it and/or |
| 8 | + * modify it under the terms of the GNU General Public License |
| 9 | + * as published by the Free Software Foundation; version 2 |
| 10 | + * of the License. |
| 11 | + * |
| 12 | + * This driver provides ioctl interfaces to call intel scu ipc driver api |
| 13 | + */ |
| 14 | + |
| 15 | +#include <linux/module.h> |
| 16 | +#include <linux/kernel.h> |
| 17 | +#include <linux/errno.h> |
| 18 | +#include <linux/types.h> |
| 19 | +#include <linux/fs.h> |
| 20 | +#include <linux/fcntl.h> |
| 21 | +#include <linux/sched.h> |
| 22 | +#include <linux/uaccess.h> |
| 23 | +#include <linux/slab.h> |
| 24 | +#include <linux/init.h> |
| 25 | +#include <asm/intel_scu_ipc.h> |
| 26 | + |
| 27 | +static u32 major; |
| 28 | + |
| 29 | +#define MAX_FW_SIZE 264192 |
| 30 | + |
| 31 | +/* ioctl commnds */ |
| 32 | +#define INTE_SCU_IPC_REGISTER_READ 0 |
| 33 | +#define INTE_SCU_IPC_REGISTER_WRITE 1 |
| 34 | +#define INTE_SCU_IPC_REGISTER_UPDATE 2 |
| 35 | +#define INTE_SCU_IPC_FW_UPDATE 0xA2 |
| 36 | + |
| 37 | +struct scu_ipc_data { |
| 38 | + u32 count; /* No. of registers */ |
| 39 | + u16 addr[5]; /* Register addresses */ |
| 40 | + u8 data[5]; /* Register data */ |
| 41 | + u8 mask; /* Valid for read-modify-write */ |
| 42 | +}; |
| 43 | + |
| 44 | +/** |
| 45 | + * scu_reg_access - implement register access ioctls |
| 46 | + * @cmd: command we are doing (read/write/update) |
| 47 | + * @data: kernel copy of ioctl data |
| 48 | + * |
| 49 | + * Allow the user to perform register accesses on the SCU via the |
| 50 | + * kernel interface |
| 51 | + */ |
| 52 | + |
| 53 | +static int scu_reg_access(u32 cmd, struct scu_ipc_data *data) |
| 54 | +{ |
| 55 | + int count = data->count; |
| 56 | + |
| 57 | + if (count == 0 || count == 3 || count > 4) |
| 58 | + return -EINVAL; |
| 59 | + |
| 60 | + switch (cmd) { |
| 61 | + case INTE_SCU_IPC_REGISTER_READ: |
| 62 | + return intel_scu_ipc_readv(data->addr, data->data, count); |
| 63 | + case INTE_SCU_IPC_REGISTER_WRITE: |
| 64 | + return intel_scu_ipc_writev(data->addr, data->data, count); |
| 65 | + case INTE_SCU_IPC_REGISTER_UPDATE: |
| 66 | + return intel_scu_ipc_update_register(data->addr[0], |
| 67 | + data->data[0], data->mask); |
| 68 | + default: |
| 69 | + return -ENOTTY; |
| 70 | + } |
| 71 | +} |
| 72 | + |
| 73 | +/** |
| 74 | + * scu_ipc_ioctl - control ioctls for the SCU |
| 75 | + * @fp: file handle of the SCU device |
| 76 | + * @cmd: ioctl coce |
| 77 | + * @arg: pointer to user passed structure |
| 78 | + * |
| 79 | + * Support the I/O and firmware flashing interfaces of the SCU |
| 80 | + */ |
| 81 | +static long scu_ipc_ioctl(struct file *fp, unsigned int cmd, |
| 82 | + unsigned long arg) |
| 83 | +{ |
| 84 | + int ret; |
| 85 | + struct scu_ipc_data data; |
| 86 | + void __user *argp = (void __user *)arg; |
| 87 | + |
| 88 | + if (!capable(CAP_SYS_RAWIO)) |
| 89 | + return -EPERM; |
| 90 | + |
| 91 | + if (cmd == INTE_SCU_IPC_FW_UPDATE) { |
| 92 | + u8 *fwbuf = kmalloc(MAX_FW_SIZE, GFP_KERNEL); |
| 93 | + if (fwbuf == NULL) |
| 94 | + return -ENOMEM; |
| 95 | + if (copy_from_user(fwbuf, (u8 *)arg, MAX_FW_SIZE)) { |
| 96 | + kfree(fwbuf); |
| 97 | + return -EFAULT; |
| 98 | + } |
| 99 | + ret = intel_scu_ipc_fw_update(fwbuf, MAX_FW_SIZE); |
| 100 | + kfree(fwbuf); |
| 101 | + return ret; |
| 102 | + } else { |
| 103 | + if (copy_from_user(&data, argp, sizeof(struct scu_ipc_data))) |
| 104 | + return -EFAULT; |
| 105 | + ret = scu_reg_access(cmd, &data); |
| 106 | + if (ret < 0) |
| 107 | + return ret; |
| 108 | + if (copy_to_user(argp, &data, sizeof(struct scu_ipc_data))) |
| 109 | + return -EFAULT; |
| 110 | + return 0; |
| 111 | + } |
| 112 | +} |
| 113 | + |
| 114 | +static const struct file_operations scu_ipc_fops = { |
| 115 | + .unlocked_ioctl = scu_ipc_ioctl, |
| 116 | +}; |
| 117 | + |
| 118 | +static int __init ipc_module_init(void) |
| 119 | +{ |
| 120 | + return register_chrdev(0, "intel_mid_scu", &scu_ipc_fops); |
| 121 | +} |
| 122 | + |
| 123 | +static void __exit ipc_module_exit(void) |
| 124 | +{ |
| 125 | + unregister_chrdev(major, "intel_mid_scu"); |
| 126 | +} |
| 127 | + |
| 128 | +module_init(ipc_module_init); |
| 129 | +module_exit(ipc_module_exit); |
| 130 | + |
| 131 | +MODULE_LICENSE("GPL V2"); |
| 132 | +MODULE_DESCRIPTION("Utility driver for intel scu ipc"); |
| 133 | +MODULE_AUTHOR( "Sreedhara <[email protected]>"); |
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