|
29 | 29 | pinctrl2 = &pinctrl_2;
|
30 | 30 | pinctrl3 = &pinctrl_3;
|
31 | 31 | pinctrl4 = &pinctrl_4;
|
32 |
| - i2c4 = &hsi2c_4; |
33 |
| - i2c5 = &hsi2c_5; |
34 |
| - i2c6 = &hsi2c_6; |
35 |
| - i2c7 = &hsi2c_7; |
36 | 32 | i2c8 = &hsi2c_8;
|
37 | 33 | i2c9 = &hsi2c_9;
|
38 | 34 | i2c10 = &hsi2c_10;
|
|
562 | 558 | status = "disabled";
|
563 | 559 | };
|
564 | 560 |
|
565 |
| - /* i2c_0-3 are defined in exynos5.dtsi */ |
566 |
| - hsi2c_4: i2c@12CA0000 { |
567 |
| - compatible = "samsung,exynos5250-hsi2c"; |
568 |
| - reg = <0x12CA0000 0x1000>; |
569 |
| - interrupts = <0 60 0>; |
570 |
| - #address-cells = <1>; |
571 |
| - #size-cells = <0>; |
572 |
| - pinctrl-names = "default"; |
573 |
| - pinctrl-0 = <&i2c4_hs_bus>; |
574 |
| - clocks = <&clock CLK_USI0>; |
575 |
| - clock-names = "hsi2c"; |
576 |
| - status = "disabled"; |
577 |
| - }; |
578 |
| - |
579 |
| - hsi2c_5: i2c@12CB0000 { |
580 |
| - compatible = "samsung,exynos5250-hsi2c"; |
581 |
| - reg = <0x12CB0000 0x1000>; |
582 |
| - interrupts = <0 61 0>; |
583 |
| - #address-cells = <1>; |
584 |
| - #size-cells = <0>; |
585 |
| - pinctrl-names = "default"; |
586 |
| - pinctrl-0 = <&i2c5_hs_bus>; |
587 |
| - clocks = <&clock CLK_USI1>; |
588 |
| - clock-names = "hsi2c"; |
589 |
| - status = "disabled"; |
590 |
| - }; |
591 |
| - |
592 |
| - hsi2c_6: i2c@12CC0000 { |
593 |
| - compatible = "samsung,exynos5250-hsi2c"; |
594 |
| - reg = <0x12CC0000 0x1000>; |
595 |
| - interrupts = <0 62 0>; |
596 |
| - #address-cells = <1>; |
597 |
| - #size-cells = <0>; |
598 |
| - pinctrl-names = "default"; |
599 |
| - pinctrl-0 = <&i2c6_hs_bus>; |
600 |
| - clocks = <&clock CLK_USI2>; |
601 |
| - clock-names = "hsi2c"; |
602 |
| - status = "disabled"; |
603 |
| - }; |
604 |
| - |
605 |
| - hsi2c_7: i2c@12CD0000 { |
606 |
| - compatible = "samsung,exynos5250-hsi2c"; |
607 |
| - reg = <0x12CD0000 0x1000>; |
608 |
| - interrupts = <0 63 0>; |
609 |
| - #address-cells = <1>; |
610 |
| - #size-cells = <0>; |
611 |
| - pinctrl-names = "default"; |
612 |
| - pinctrl-0 = <&i2c7_hs_bus>; |
613 |
| - clocks = <&clock CLK_USI3>; |
614 |
| - clock-names = "hsi2c"; |
615 |
| - status = "disabled"; |
616 |
| - }; |
617 |
| - |
618 | 561 | hsi2c_8: i2c@12E00000 {
|
619 | 562 | compatible = "samsung,exynos5250-hsi2c";
|
620 | 563 | reg = <0x12E00000 0x1000>;
|
|
1429 | 1372 | pinctrl-0 = <&i2c3_bus>;
|
1430 | 1373 | };
|
1431 | 1374 |
|
| 1375 | +&hsi2c_4 { |
| 1376 | + clocks = <&clock CLK_USI0>; |
| 1377 | + clock-names = "hsi2c"; |
| 1378 | + pinctrl-names = "default"; |
| 1379 | + pinctrl-0 = <&i2c4_hs_bus>; |
| 1380 | +}; |
| 1381 | + |
| 1382 | +&hsi2c_5 { |
| 1383 | + clocks = <&clock CLK_USI1>; |
| 1384 | + clock-names = "hsi2c"; |
| 1385 | + pinctrl-names = "default"; |
| 1386 | + pinctrl-0 = <&i2c5_hs_bus>; |
| 1387 | +}; |
| 1388 | + |
| 1389 | +&hsi2c_6 { |
| 1390 | + clocks = <&clock CLK_USI2>; |
| 1391 | + clock-names = "hsi2c"; |
| 1392 | + pinctrl-names = "default"; |
| 1393 | + pinctrl-0 = <&i2c6_hs_bus>; |
| 1394 | +}; |
| 1395 | + |
| 1396 | +&hsi2c_7 { |
| 1397 | + clocks = <&clock CLK_USI3>; |
| 1398 | + clock-names = "hsi2c"; |
| 1399 | + pinctrl-names = "default"; |
| 1400 | + pinctrl-0 = <&i2c7_hs_bus>; |
| 1401 | +}; |
| 1402 | + |
1432 | 1403 | &mct {
|
1433 | 1404 | clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
|
1434 | 1405 | clock-names = "fin_pll", "mct";
|
|
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