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Merge tag 'hwmon-for-v6.11-rc7' into review-hans
Merge "hwmon fixes for v6.11-rc7" into review-hans to bring in commit a54da9d ("hwmon: (hp-wmi-sensors) Check if WMI event data exists"). This is a dependency for a set of WMI event data refactoring changes.
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.mailmap

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@@ -166,6 +166,7 @@ Daniel Borkmann <[email protected]> <[email protected]>
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David Brownell <[email protected]>
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@@ -353,6 +354,8 @@ Kenneth Westfield <[email protected]> <[email protected]>
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Kishon Vijay Abraham I <[email protected]> <[email protected]>
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Konstantin Khlebnikov <[email protected]> <[email protected]>
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Konstantin Khlebnikov <[email protected]> <[email protected]>
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@@ -613,6 +616,7 @@ Simon Kelley <[email protected]>
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Sricharan Ramabadhran <[email protected]> <[email protected]>
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Stanislav Fomichev <[email protected]> <[email protected]>
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Stéphane Witzmann <[email protected]>

Documentation/ABI/testing/sysfs-bus-i2c-devices-turris-omnia-mcu

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@@ -32,9 +32,9 @@ Description: (RW) The front button on the Turris Omnia router can be
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interrupt.
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This file switches between these two modes:
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- "mcu" makes the button press event be handled by the MCU to
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change the LEDs panel intensity.
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- "cpu" makes the button press event be handled by the CPU.
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- ``mcu`` makes the button press event be handled by the MCU to
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change the LEDs panel intensity.
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- ``cpu`` makes the button press event be handled by the CPU.
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Format: %s.
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Documentation/ABI/testing/sysfs-devices-system-cpu

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@@ -562,7 +562,8 @@ Description: Control Symmetric Multi Threading (SMT)
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================ =========================================
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If control status is "forceoff" or "notsupported" writes
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are rejected.
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are rejected. Note that enabling SMT on PowerPC skips
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offline cores.
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What: /sys/devices/system/cpu/cpuX/power/energy_perf_bias
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Date: March 2019

Documentation/admin-guide/cifs/usage.rst

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@@ -742,7 +742,7 @@ SecurityFlags Flags which control security negotiation and
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may use NTLMSSP 0x00080
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must use NTLMSSP 0x80080
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seal (packet encryption) 0x00040
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must seal (not implemented yet) 0x40040
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must seal 0x40040
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cifsFYI If set to non-zero value, additional debug information
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will be logged to the system error log. This field

Documentation/admin-guide/device-mapper/dm-crypt.rst

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Module parameters::
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max_read_size
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max_write_size
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Maximum size of read or write requests. When a request larger than this size
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is received, dm-crypt will split the request. The splitting improves
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concurrency (the split requests could be encrypted in parallel by multiple
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cores), but it also causes overhead. The user should tune these parameters to
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fit the actual workload.
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max_read_size
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max_write_size
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Maximum size of read or write requests. When a request larger than this size
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is received, dm-crypt will split the request. The splitting improves
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concurrency (the split requests could be encrypted in parallel by multiple
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cores), but it also causes overhead. The user should tune these parameters to
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fit the actual workload.
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Example scripts

Documentation/admin-guide/kernel-parameters.txt

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profile= [KNL] Enable kernel profiling via /proc/profile
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Format: [<profiletype>,]<number>
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Param: <profiletype>: "schedule", "sleep", or "kvm"
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Param: <profiletype>: "schedule" or "kvm"
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[defaults to kernel profiling]
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Param: "schedule" - profile schedule points.
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Param: "sleep" - profile D-state sleeping (millisecs).
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Requires CONFIG_SCHEDSTATS
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Param: "kvm" - profile VM exits.
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Param: <number> - step/bucket size as a power of 2 for
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statistical time based profiling.

Documentation/arch/arm64/silicon-errata.rst

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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A76 | #1490853 | N/A |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A76 | #3324349 | ARM64_ERRATUM_3194386 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A77 | #1491015 | N/A |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A77 | #1508412 | ARM64_ERRATUM_1508412 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A77 | #3324348 | ARM64_ERRATUM_3194386 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A78 | #3324344 | ARM64_ERRATUM_3194386 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A78C | #3324346,3324347| ARM64_ERRATUM_3194386 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A710 | #2119858 | ARM64_ERRATUM_2119858 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A710 | #2054223 | ARM64_ERRATUM_2054223 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A720 | #3456091 | ARM64_ERRATUM_3194386 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A725 | #3456106 | ARM64_ERRATUM_3194386 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-X1 | #1502854 | N/A |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-X1 | #3324344 | ARM64_ERRATUM_3194386 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-X1C | #3324346 | ARM64_ERRATUM_3194386 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-X2 | #2119858 | ARM64_ERRATUM_2119858 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-X2 | #2224489 | ARM64_ERRATUM_2224489 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Neoverse-N1 | #1542419 | ARM64_ERRATUM_1542419 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Neoverse-N1 | #3324349 | ARM64_ERRATUM_3194386 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Neoverse-N2 | #2139208 | ARM64_ERRATUM_2139208 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Neoverse-N2 | #2067961 | ARM64_ERRATUM_2067961 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Neoverse-V1 | #1619801 | N/A |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Neoverse-V1 | #3324341 | ARM64_ERRATUM_3194386 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Neoverse-V2 | #3324336 | ARM64_ERRATUM_3194386 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Neoverse-V3 | #3312417 | ARM64_ERRATUM_3194386 |

Documentation/arch/riscv/hwprobe.rst

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ratified in commit 98918c844281 ("Merge pull request #1217 from
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* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance
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information about the selected set of processors.
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* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: Deprecated. Returns similar values to
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:c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF`, but the key was
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mistakenly classified as a bitmask rather than a value.
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* :c:macro:`RISCV_HWPROBE_MISALIGNED_UNKNOWN`: The performance of misaligned
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accesses is unknown.
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* :c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF`: An enum value describing
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the performance of misaligned scalar native word accesses on the selected set
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of processors.
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* :c:macro:`RISCV_HWPROBE_MISALIGNED_EMULATED`: Misaligned accesses are
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emulated via software, either in or below the kernel. These accesses are
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always extremely slow.
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* :c:macro:`RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN`: The performance of
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misaligned scalar accesses is unknown.
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* :c:macro:`RISCV_HWPROBE_MISALIGNED_SLOW`: Misaligned accesses are slower
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than equivalent byte accesses. Misaligned accesses may be supported
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directly in hardware, or trapped and emulated by software.
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* :c:macro:`RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED`: Misaligned scalar
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accesses are emulated via software, either in or below the kernel. These
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accesses are always extremely slow.
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* :c:macro:`RISCV_HWPROBE_MISALIGNED_FAST`: Misaligned accesses are faster
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than equivalent byte accesses.
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* :c:macro:`RISCV_HWPROBE_MISALIGNED_SCALAR_SLOW`: Misaligned scalar native
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word sized accesses are slower than the equivalent quantity of byte
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accesses. Misaligned accesses may be supported directly in hardware, or
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trapped and emulated by software.
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* :c:macro:`RISCV_HWPROBE_MISALIGNED_UNSUPPORTED`: Misaligned accesses are
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not supported at all and will generate a misaligned address fault.
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* :c:macro:`RISCV_HWPROBE_MISALIGNED_SCALAR_FAST`: Misaligned scalar native
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word sized accesses are faster than the equivalent quantity of byte
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accesses.
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* :c:macro:`RISCV_HWPROBE_MISALIGNED_SCALAR_UNSUPPORTED`: Misaligned scalar
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accesses are not supported at all and will generate a misaligned address
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* :c:macro:`RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE`: An unsigned int which
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Documentation/core-api/workqueue.rst

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is in flight at any given time and the work items are processed in
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queueing order. While the combination of ``@max_active`` of 1 and
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case. Use alloc_ordered_workqueue() instead.
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Example Execution Scenarios

Documentation/devicetree/bindings/ata/rockchip,dwc-ahci.yaml

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power-domains:
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maxItems: 1
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$ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port
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Documentation/devicetree/bindings/clock/qcom,dispcc-sm6350.yaml

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Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml

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Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml

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Documentation/devicetree/bindings/clock/qcom,gcc-sm6350.yaml

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Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.yaml

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Documentation/devicetree/bindings/clock/qcom,sm6125-gpucc.yaml

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Documentation/devicetree/bindings/clock/qcom,sm6350-camcc.yaml

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Documentation/devicetree/bindings/clock/qcom,sm6375-dispcc.yaml

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Documentation/devicetree/bindings/clock/qcom,sm6375-gcc.yaml

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Documentation/devicetree/bindings/clock/qcom,sm6375-gpucc.yaml

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Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml

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title: Qualcomm SM8350 Video Clock & Reset Controller
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Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml

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Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml

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SM6375 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks

Documentation/devicetree/bindings/display/panel/asus,z00t-tm5p5-nt35596.yaml

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title: ASUS Z00T TM5P5 NT35596 5.5" 1080×1920 LCD Panel
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This panel seems to only be found in the Asus Z00T

Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml

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# Samsung 13.3" FHD (1920x1080 pixels) eDP AMOLED panel
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# Samsung 14.5" WQXGA+ (2880x1800 pixels) eDP AMOLED panel
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- items:
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- const: samsung,atna45af01
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- enum:
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# Samsung 14.5" WQXGA+ (2880x1800 pixels) eDP AMOLED panel
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- samsung,atna45af01
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# Samsung 14.5" 3K (2944x1840 pixels) eDP AMOLED panel
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- samsung,atna45dc02
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Documentation/devicetree/bindings/display/panel/sony,td4353-jdi.yaml

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title: Sony TD4353 JDI 5 / 5.7" 2160x1080 MIPI-DSI Panel
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The Sony TD4353 JDI is a 5 (XZ2c) / 5.7 (XZ2) inch 2160x1080

Documentation/devicetree/bindings/eeprom/at25.yaml

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- anvo,anv32e61w
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- atmel,at25256B
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- fujitsu,mb85rs1mt
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- fujitsu,mb85rs256
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- fujitsu,mb85rs64
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- microchip,at25160bn
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- microchip,25lc040

Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml

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- focaltech,ft5426
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- focaltech,ft5452
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- focaltech,ft6236
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- focaltech,ft8201
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- focaltech,ft8719
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reg:

Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml

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- Bjorn Andersson <[email protected]>
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RPMh interconnect providers support system bandwidth requirements through

Documentation/devicetree/bindings/interconnect/qcom,sc8280xp-rpmh.yaml

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RPMh interconnect providers support system bandwidth requirements through

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