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Asutosh Dasmartinkpetersen
Asutosh Das
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martinkpetersen
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scsi: ufs: core: mcq: Add support to allocate multiple queues
Multi-circular queue (MCQ) has been added in UFSHC v4.0 standard in addition to the Single Doorbell mode. The MCQ mode supports multiple submission and completion queues. Add support to allocate and configure the queues. Add module parameters support to configure the queues. Co-developed-by: Can Guo <[email protected]> Signed-off-by: Can Guo <[email protected]> Signed-off-by: Asutosh Das <[email protected]> Reviewed-by: Bart Van Assche <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Martin K. Petersen <[email protected]>
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‎drivers/ufs/core/Makefile

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_SCSI_UFSHCD) += ufshcd-core.o
4-
ufshcd-core-y += ufshcd.o ufs-sysfs.o
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ufshcd-core-y += ufshcd.o ufs-sysfs.o ufs-mcq.o
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ufshcd-core-$(CONFIG_DEBUG_FS) += ufs-debugfs.o
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ufshcd-core-$(CONFIG_SCSI_UFS_BSG) += ufs_bsg.o
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ufshcd-core-$(CONFIG_SCSI_UFS_CRYPTO) += ufshcd-crypto.o

‎drivers/ufs/core/ufs-mcq.c

Lines changed: 124 additions & 0 deletions
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@@ -0,0 +1,124 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2022 Qualcomm Innovation Center. All rights reserved.
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*
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* Authors:
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* Asutosh Das <[email protected]>
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* Can Guo <[email protected]>
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*/
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#include <asm/unaligned.h>
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#include <linux/dma-mapping.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include "ufshcd-priv.h"
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#define MAX_QUEUE_SUP GENMASK(7, 0)
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#define UFS_MCQ_MIN_RW_QUEUES 2
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#define UFS_MCQ_MIN_READ_QUEUES 0
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#define UFS_MCQ_NUM_DEV_CMD_QUEUES 1
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#define UFS_MCQ_MIN_POLL_QUEUES 0
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static int rw_queue_count_set(const char *val, const struct kernel_param *kp)
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{
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return param_set_uint_minmax(val, kp, UFS_MCQ_MIN_RW_QUEUES,
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num_possible_cpus());
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}
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static const struct kernel_param_ops rw_queue_count_ops = {
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.set = rw_queue_count_set,
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.get = param_get_uint,
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};
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static unsigned int rw_queues;
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module_param_cb(rw_queues, &rw_queue_count_ops, &rw_queues, 0644);
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MODULE_PARM_DESC(rw_queues,
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"Number of interrupt driven I/O queues used for rw. Default value is nr_cpus");
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static int read_queue_count_set(const char *val, const struct kernel_param *kp)
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{
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return param_set_uint_minmax(val, kp, UFS_MCQ_MIN_READ_QUEUES,
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num_possible_cpus());
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}
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static const struct kernel_param_ops read_queue_count_ops = {
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.set = read_queue_count_set,
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.get = param_get_uint,
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};
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static unsigned int read_queues;
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module_param_cb(read_queues, &read_queue_count_ops, &read_queues, 0644);
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MODULE_PARM_DESC(read_queues,
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"Number of interrupt driven read queues used for read. Default value is 0");
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static int poll_queue_count_set(const char *val, const struct kernel_param *kp)
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{
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return param_set_uint_minmax(val, kp, UFS_MCQ_MIN_POLL_QUEUES,
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num_possible_cpus());
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}
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static const struct kernel_param_ops poll_queue_count_ops = {
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.set = poll_queue_count_set,
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.get = param_get_uint,
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};
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static unsigned int poll_queues = 1;
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module_param_cb(poll_queues, &poll_queue_count_ops, &poll_queues, 0644);
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MODULE_PARM_DESC(poll_queues,
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"Number of poll queues used for r/w. Default value is 1");
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static int ufshcd_mcq_config_nr_queues(struct ufs_hba *hba)
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{
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int i;
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u32 hba_maxq, rem, tot_queues;
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struct Scsi_Host *host = hba->host;
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hba_maxq = FIELD_GET(MAX_QUEUE_SUP, hba->mcq_capabilities);
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tot_queues = UFS_MCQ_NUM_DEV_CMD_QUEUES + read_queues + poll_queues +
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rw_queues;
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if (hba_maxq < tot_queues) {
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dev_err(hba->dev, "Total queues (%d) exceeds HC capacity (%d)\n",
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tot_queues, hba_maxq);
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return -EOPNOTSUPP;
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}
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rem = hba_maxq - UFS_MCQ_NUM_DEV_CMD_QUEUES;
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if (rw_queues) {
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hba->nr_queues[HCTX_TYPE_DEFAULT] = rw_queues;
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rem -= hba->nr_queues[HCTX_TYPE_DEFAULT];
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} else {
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rw_queues = num_possible_cpus();
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}
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if (poll_queues) {
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hba->nr_queues[HCTX_TYPE_POLL] = poll_queues;
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rem -= hba->nr_queues[HCTX_TYPE_POLL];
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}
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if (read_queues) {
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hba->nr_queues[HCTX_TYPE_READ] = read_queues;
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rem -= hba->nr_queues[HCTX_TYPE_READ];
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}
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if (!hba->nr_queues[HCTX_TYPE_DEFAULT])
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hba->nr_queues[HCTX_TYPE_DEFAULT] = min3(rem, rw_queues,
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num_possible_cpus());
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for (i = 0; i < HCTX_MAX_TYPES; i++)
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host->nr_hw_queues += hba->nr_queues[i];
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hba->nr_hw_queues = host->nr_hw_queues + UFS_MCQ_NUM_DEV_CMD_QUEUES;
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return 0;
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}
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int ufshcd_mcq_init(struct ufs_hba *hba)
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{
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int ret;
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ret = ufshcd_mcq_config_nr_queues(hba);
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return ret;
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}

‎drivers/ufs/core/ufshcd-priv.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -61,6 +61,7 @@ int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
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int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
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enum flag_idn idn, u8 index, bool *flag_res);
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void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit);
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int ufshcd_mcq_init(struct ufs_hba *hba);
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#define SD_ASCII_STD true
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#define SD_RAW false

‎drivers/ufs/core/ufshcd.c

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8294,6 +8294,11 @@ static int ufshcd_add_lus(struct ufs_hba *hba)
82948294
return ret;
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}
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static int ufshcd_alloc_mcq(struct ufs_hba *hba)
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{
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return ufshcd_mcq_init(hba);
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}
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static int ufshcd_device_init(struct ufs_hba *hba, bool init_dev_params)
82988303
{
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int ret;
@@ -8333,6 +8338,13 @@ static int ufshcd_device_init(struct ufs_hba *hba, bool init_dev_params)
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if (ret)
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return ret;
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if (is_mcq_supported(hba) && !hba->scsi_host_added) {
8341+
ret = ufshcd_alloc_mcq(hba);
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if (ret) {
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/* Continue with SDB mode */
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use_mcq_mode = false;
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dev_err(hba->dev, "MCQ mode is disabled, err=%d\n",
8346+
ret);
8347+
}
83368348
ret = scsi_add_host(host, hba->dev);
83378349
if (ret) {
83388350
dev_err(hba->dev, "scsi_add_host failed\n");

‎include/ufs/ufshcd.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -840,6 +840,8 @@ struct ufs_hba_monitor {
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* ee_ctrl_mask
841841
* @luns_avail: number of regular and well known LUNs supported by the UFS
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* device
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* @nr_hw_queues: number of hardware queues configured
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* @nr_queues: number of Queues of different queue types
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* @complete_put: whether or not to call ufshcd_rpm_put() from inside
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* ufshcd_resume_complete()
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* @ext_iid_sup: is EXT_IID is supported by UFSHC
@@ -994,6 +996,8 @@ struct ufs_hba {
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u32 debugfs_ee_rate_limit_ms;
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#endif
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u32 luns_avail;
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unsigned int nr_hw_queues;
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unsigned int nr_queues[HCTX_MAX_TYPES];
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bool complete_put;
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bool ext_iid_sup;
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bool scsi_host_added;

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