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2 | 2 | /* Copyright (c) 2020, Mellanox Technologies inc. All rights reserved. */
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3 | 3 |
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4 | 4 | #include "en/devlink.h"
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| 5 | +#include "eswitch.h" |
| 6 | + |
| 7 | +static void |
| 8 | +mlx5e_devlink_get_port_parent_id(struct mlx5_core_dev *dev, struct netdev_phys_item_id *ppid) |
| 9 | +{ |
| 10 | + u64 parent_id; |
| 11 | + |
| 12 | + parent_id = mlx5_query_nic_system_image_guid(dev); |
| 13 | + ppid->id_len = sizeof(parent_id); |
| 14 | + memcpy(ppid->id, &parent_id, sizeof(parent_id)); |
| 15 | +} |
5 | 16 |
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6 | 17 | int mlx5e_devlink_port_register(struct mlx5e_priv *priv)
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7 | 18 | {
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8 | 19 | struct devlink *devlink = priv_to_devlink(priv->mdev);
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9 | 20 | struct devlink_port_attrs attrs = {};
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| 21 | + struct netdev_phys_item_id ppid = {}; |
| 22 | + unsigned int dl_port_index; |
10 | 23 |
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11 | 24 | if (mlx5_core_is_pf(priv->mdev)) {
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12 | 25 | attrs.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL;
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13 | 26 | attrs.phys.port_number = PCI_FUNC(priv->mdev->pdev->devfn);
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| 27 | + if (MLX5_ESWITCH_MANAGER(priv->mdev)) { |
| 28 | + mlx5e_devlink_get_port_parent_id(priv->mdev, &ppid); |
| 29 | + memcpy(attrs.switch_id.id, ppid.id, ppid.id_len); |
| 30 | + attrs.switch_id.id_len = ppid.id_len; |
| 31 | + } |
| 32 | + dl_port_index = mlx5_esw_vport_to_devlink_port_index(priv->mdev, |
| 33 | + MLX5_VPORT_UPLINK); |
14 | 34 | } else {
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15 | 35 | attrs.flavour = DEVLINK_PORT_FLAVOUR_VIRTUAL;
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| 36 | + dl_port_index = mlx5_esw_vport_to_devlink_port_index(priv->mdev, 0); |
16 | 37 | }
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17 | 38 |
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18 | 39 | devlink_port_attrs_set(&priv->dl_port, &attrs);
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19 | 40 |
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20 |
| - return devlink_port_register(devlink, &priv->dl_port, 1); |
| 41 | + return devlink_port_register(devlink, &priv->dl_port, dl_port_index); |
21 | 42 | }
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22 | 43 |
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23 | 44 | void mlx5e_devlink_port_type_eth_set(struct mlx5e_priv *priv)
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