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Merge branch 'drm-fixes-4.17' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
A little bigger than normal since this is two weeks of fixes. - Atom firmware table updates for vega12 - Fix fallout from huge page support - Fix up smu7 power profile interface to be consistent with vega - Misc other fixes * 'drm-fixes-4.17' of git://people.freedesktop.org/~agd5f/linux: drm/amd/pp: Refine the output of pp_power_profile_mode on VI drm/amdgpu: Switch to interruptable wait to recover from ring hang. drm/ttm: Use GFP_TRANSHUGE_LIGHT for allocating huge pages drm/amd/display: Use kvzalloc for potentially large allocations drm/amd/display: Don't return ddc result and read_bytes in same return value drm/amd/display: Add get_firmware_info_v3_2 for VG12 drm/amd: Add BIOS smu_info v3_3 required struct def. drm/amd/display: Add VG12 ASIC IDs
2 parents 44ef02c + 639f790 commit 5c0e0b4

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13 files changed

+364
-95
lines changed

13 files changed

+364
-95
lines changed

‎drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -419,9 +419,11 @@ int amdgpu_ctx_wait_prev_fence(struct amdgpu_ctx *ctx, unsigned ring_id)
419419

420420
if (other) {
421421
signed long r;
422-
r = dma_fence_wait_timeout(other, false, MAX_SCHEDULE_TIMEOUT);
422+
r = dma_fence_wait(other, true);
423423
if (r < 0) {
424-
DRM_ERROR("Error (%ld) waiting for fence!\n", r);
424+
if (r != -ERESTARTSYS)
425+
DRM_ERROR("Error (%ld) waiting for fence!\n", r);
426+
425427
return r;
426428
}
427429
}

‎drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

Lines changed: 12 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -83,21 +83,22 @@ static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux,
8383
enum i2c_mot_mode mot = (msg->request & DP_AUX_I2C_MOT) ?
8484
I2C_MOT_TRUE : I2C_MOT_FALSE;
8585
enum ddc_result res;
86-
ssize_t read_bytes;
86+
uint32_t read_bytes = msg->size;
8787

8888
if (WARN_ON(msg->size > 16))
8989
return -E2BIG;
9090

9191
switch (msg->request & ~DP_AUX_I2C_MOT) {
9292
case DP_AUX_NATIVE_READ:
93-
read_bytes = dal_ddc_service_read_dpcd_data(
93+
res = dal_ddc_service_read_dpcd_data(
9494
TO_DM_AUX(aux)->ddc_service,
9595
false,
9696
I2C_MOT_UNDEF,
9797
msg->address,
9898
msg->buffer,
99-
msg->size);
100-
return read_bytes;
99+
msg->size,
100+
&read_bytes);
101+
break;
101102
case DP_AUX_NATIVE_WRITE:
102103
res = dal_ddc_service_write_dpcd_data(
103104
TO_DM_AUX(aux)->ddc_service,
@@ -108,14 +109,15 @@ static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux,
108109
msg->size);
109110
break;
110111
case DP_AUX_I2C_READ:
111-
read_bytes = dal_ddc_service_read_dpcd_data(
112+
res = dal_ddc_service_read_dpcd_data(
112113
TO_DM_AUX(aux)->ddc_service,
113114
true,
114115
mot,
115116
msg->address,
116117
msg->buffer,
117-
msg->size);
118-
return read_bytes;
118+
msg->size,
119+
&read_bytes);
120+
break;
119121
case DP_AUX_I2C_WRITE:
120122
res = dal_ddc_service_write_dpcd_data(
121123
TO_DM_AUX(aux)->ddc_service,
@@ -137,7 +139,9 @@ static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux,
137139
r == DDC_RESULT_SUCESSFULL);
138140
#endif
139141

140-
return msg->size;
142+
if (res != DDC_RESULT_SUCESSFULL)
143+
return -EIO;
144+
return read_bytes;
141145
}
142146

143147
static enum drm_connector_status

‎drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

Lines changed: 85 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -70,6 +70,10 @@ static enum bp_result get_firmware_info_v3_1(
7070
struct bios_parser *bp,
7171
struct dc_firmware_info *info);
7272

73+
static enum bp_result get_firmware_info_v3_2(
74+
struct bios_parser *bp,
75+
struct dc_firmware_info *info);
76+
7377
static struct atom_hpd_int_record *get_hpd_record(struct bios_parser *bp,
7478
struct atom_display_object_path_v2 *object);
7579

@@ -1321,9 +1325,11 @@ static enum bp_result bios_parser_get_firmware_info(
13211325
case 3:
13221326
switch (revision.minor) {
13231327
case 1:
1324-
case 2:
13251328
result = get_firmware_info_v3_1(bp, info);
13261329
break;
1330+
case 2:
1331+
result = get_firmware_info_v3_2(bp, info);
1332+
break;
13271333
default:
13281334
break;
13291335
}
@@ -1383,6 +1389,84 @@ static enum bp_result get_firmware_info_v3_1(
13831389
return BP_RESULT_OK;
13841390
}
13851391

1392+
static enum bp_result get_firmware_info_v3_2(
1393+
struct bios_parser *bp,
1394+
struct dc_firmware_info *info)
1395+
{
1396+
struct atom_firmware_info_v3_2 *firmware_info;
1397+
struct atom_display_controller_info_v4_1 *dce_info = NULL;
1398+
struct atom_common_table_header *header;
1399+
struct atom_data_revision revision;
1400+
struct atom_smu_info_v3_2 *smu_info_v3_2 = NULL;
1401+
struct atom_smu_info_v3_3 *smu_info_v3_3 = NULL;
1402+
1403+
if (!info)
1404+
return BP_RESULT_BADINPUT;
1405+
1406+
firmware_info = GET_IMAGE(struct atom_firmware_info_v3_2,
1407+
DATA_TABLES(firmwareinfo));
1408+
1409+
dce_info = GET_IMAGE(struct atom_display_controller_info_v4_1,
1410+
DATA_TABLES(dce_info));
1411+
1412+
if (!firmware_info || !dce_info)
1413+
return BP_RESULT_BADBIOSTABLE;
1414+
1415+
memset(info, 0, sizeof(*info));
1416+
1417+
header = GET_IMAGE(struct atom_common_table_header,
1418+
DATA_TABLES(smu_info));
1419+
get_atom_data_table_revision(header, &revision);
1420+
1421+
if (revision.minor == 2) {
1422+
/* Vega12 */
1423+
smu_info_v3_2 = GET_IMAGE(struct atom_smu_info_v3_2,
1424+
DATA_TABLES(smu_info));
1425+
1426+
if (!smu_info_v3_2)
1427+
return BP_RESULT_BADBIOSTABLE;
1428+
1429+
info->default_engine_clk = smu_info_v3_2->bootup_dcefclk_10khz * 10;
1430+
} else if (revision.minor == 3) {
1431+
/* Vega20 */
1432+
smu_info_v3_3 = GET_IMAGE(struct atom_smu_info_v3_3,
1433+
DATA_TABLES(smu_info));
1434+
1435+
if (!smu_info_v3_3)
1436+
return BP_RESULT_BADBIOSTABLE;
1437+
1438+
info->default_engine_clk = smu_info_v3_3->bootup_dcefclk_10khz * 10;
1439+
}
1440+
1441+
// We need to convert from 10KHz units into KHz units.
1442+
info->default_memory_clk = firmware_info->bootup_mclk_in10khz * 10;
1443+
1444+
/* 27MHz for Vega10 & Vega12; 100MHz for Vega20 */
1445+
info->pll_info.crystal_frequency = dce_info->dce_refclk_10khz * 10;
1446+
/* Hardcode frequency if BIOS gives no DCE Ref Clk */
1447+
if (info->pll_info.crystal_frequency == 0) {
1448+
if (revision.minor == 2)
1449+
info->pll_info.crystal_frequency = 27000;
1450+
else if (revision.minor == 3)
1451+
info->pll_info.crystal_frequency = 100000;
1452+
}
1453+
/*dp_phy_ref_clk is not correct for atom_display_controller_info_v4_2, but we don't use it*/
1454+
info->dp_phy_ref_clk = dce_info->dpphy_refclk_10khz * 10;
1455+
info->i2c_engine_ref_clk = dce_info->i2c_engine_refclk_10khz * 10;
1456+
1457+
/* Get GPU PLL VCO Clock */
1458+
if (bp->cmd_tbl.get_smu_clock_info != NULL) {
1459+
if (revision.minor == 2)
1460+
info->smu_gpu_pll_output_freq =
1461+
bp->cmd_tbl.get_smu_clock_info(bp, SMU9_SYSPLL0_ID) * 10;
1462+
else if (revision.minor == 3)
1463+
info->smu_gpu_pll_output_freq =
1464+
bp->cmd_tbl.get_smu_clock_info(bp, SMU11_SYSPLL3_0_ID) * 10;
1465+
}
1466+
1467+
return BP_RESULT_OK;
1468+
}
1469+
13861470
static enum bp_result bios_parser_get_encoder_cap_info(
13871471
struct dc_bios *dcb,
13881472
struct graphics_object_id object_id,

‎drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -629,13 +629,14 @@ bool dal_ddc_service_query_ddc_data(
629629
return ret;
630630
}
631631

632-
ssize_t dal_ddc_service_read_dpcd_data(
632+
enum ddc_result dal_ddc_service_read_dpcd_data(
633633
struct ddc_service *ddc,
634634
bool i2c,
635635
enum i2c_mot_mode mot,
636636
uint32_t address,
637637
uint8_t *data,
638-
uint32_t len)
638+
uint32_t len,
639+
uint32_t *read)
639640
{
640641
struct aux_payload read_payload = {
641642
.i2c_over_aux = i2c,
@@ -652,6 +653,8 @@ ssize_t dal_ddc_service_read_dpcd_data(
652653
.mot = mot
653654
};
654655

656+
*read = 0;
657+
655658
if (len > DEFAULT_AUX_MAX_DATA_SIZE) {
656659
BREAK_TO_DEBUGGER();
657660
return DDC_RESULT_FAILED_INVALID_OPERATION;
@@ -661,7 +664,8 @@ ssize_t dal_ddc_service_read_dpcd_data(
661664
ddc->ctx->i2caux,
662665
ddc->ddc_pin,
663666
&command)) {
664-
return (ssize_t)command.payloads->length;
667+
*read = command.payloads->length;
668+
return DDC_RESULT_SUCESSFULL;
665669
}
666670

667671
return DDC_RESULT_FAILED_OPERATION;

‎drivers/gpu/drm/amd/display/dc/core/dc_surface.c

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -66,8 +66,8 @@ struct dc_plane_state *dc_create_plane_state(struct dc *dc)
6666
{
6767
struct dc *core_dc = dc;
6868

69-
struct dc_plane_state *plane_state = kzalloc(sizeof(*plane_state),
70-
GFP_KERNEL);
69+
struct dc_plane_state *plane_state = kvzalloc(sizeof(*plane_state),
70+
GFP_KERNEL);
7171

7272
if (NULL == plane_state)
7373
return NULL;
@@ -120,7 +120,7 @@ static void dc_plane_state_free(struct kref *kref)
120120
{
121121
struct dc_plane_state *plane_state = container_of(kref, struct dc_plane_state, refcount);
122122
destruct(plane_state);
123-
kfree(plane_state);
123+
kvfree(plane_state);
124124
}
125125

126126
void dc_plane_state_release(struct dc_plane_state *plane_state)
@@ -136,7 +136,7 @@ void dc_gamma_retain(struct dc_gamma *gamma)
136136
static void dc_gamma_free(struct kref *kref)
137137
{
138138
struct dc_gamma *gamma = container_of(kref, struct dc_gamma, refcount);
139-
kfree(gamma);
139+
kvfree(gamma);
140140
}
141141

142142
void dc_gamma_release(struct dc_gamma **gamma)
@@ -147,7 +147,7 @@ void dc_gamma_release(struct dc_gamma **gamma)
147147

148148
struct dc_gamma *dc_create_gamma(void)
149149
{
150-
struct dc_gamma *gamma = kzalloc(sizeof(*gamma), GFP_KERNEL);
150+
struct dc_gamma *gamma = kvzalloc(sizeof(*gamma), GFP_KERNEL);
151151

152152
if (gamma == NULL)
153153
goto alloc_fail;
@@ -167,7 +167,7 @@ void dc_transfer_func_retain(struct dc_transfer_func *tf)
167167
static void dc_transfer_func_free(struct kref *kref)
168168
{
169169
struct dc_transfer_func *tf = container_of(kref, struct dc_transfer_func, refcount);
170-
kfree(tf);
170+
kvfree(tf);
171171
}
172172

173173
void dc_transfer_func_release(struct dc_transfer_func *tf)
@@ -177,7 +177,7 @@ void dc_transfer_func_release(struct dc_transfer_func *tf)
177177

178178
struct dc_transfer_func *dc_create_transfer_func(void)
179179
{
180-
struct dc_transfer_func *tf = kzalloc(sizeof(*tf), GFP_KERNEL);
180+
struct dc_transfer_func *tf = kvzalloc(sizeof(*tf), GFP_KERNEL);
181181

182182
if (tf == NULL)
183183
goto alloc_fail;

‎drivers/gpu/drm/amd/display/dc/inc/dc_link_ddc.h

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -102,13 +102,14 @@ bool dal_ddc_service_query_ddc_data(
102102
uint8_t *read_buf,
103103
uint32_t read_size);
104104

105-
ssize_t dal_ddc_service_read_dpcd_data(
105+
enum ddc_result dal_ddc_service_read_dpcd_data(
106106
struct ddc_service *ddc,
107107
bool i2c,
108108
enum i2c_mot_mode mot,
109109
uint32_t address,
110110
uint8_t *data,
111-
uint32_t len);
111+
uint32_t len,
112+
uint32_t *read);
112113

113114
enum ddc_result dal_ddc_service_write_dpcd_data(
114115
struct ddc_service *ddc,

‎drivers/gpu/drm/amd/display/include/dal_asic_id.h

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -113,9 +113,14 @@
113113

114114
#define AI_GREENLAND_P_A0 1
115115
#define AI_GREENLAND_P_A1 2
116+
#define AI_UNKNOWN 0xFF
116117

117-
#define ASICREV_IS_GREENLAND_M(eChipRev) (eChipRev < AI_UNKNOWN)
118-
#define ASICREV_IS_GREENLAND_P(eChipRev) (eChipRev < AI_UNKNOWN)
118+
#define AI_VEGA12_P_A0 20
119+
#define ASICREV_IS_GREENLAND_M(eChipRev) (eChipRev < AI_VEGA12_P_A0)
120+
#define ASICREV_IS_GREENLAND_P(eChipRev) (eChipRev < AI_VEGA12_P_A0)
121+
122+
#define ASICREV_IS_VEGA12_P(eChipRev) ((eChipRev >= AI_VEGA12_P_A0) && (eChipRev < AI_UNKNOWN))
123+
#define ASICREV_IS_VEGA12_p(eChipRev) ((eChipRev >= AI_VEGA12_P_A0) && (eChipRev < AI_UNKNOWN))
119124

120125
/* DCN1_0 */
121126
#define INTERNAL_REV_RAVEN_A0 0x00 /* First spin of Raven */

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