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chleroympe
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powerpc: Make eh value more explicit when using lwarx
Just like the first patch of this series, define a local 'eh' in order to make the code clearer. And IS_ENABLED() returns either 1 or 0 so no need to do IS_ENABLED(CONFIG_PPC64) ? 1 : 0. Signed-off-by: Christophe Leroy <[email protected]> [mpe: Use symbolic names, use 'n' constraint per Segher] Signed-off-by: Michael Ellerman <[email protected]> Link: https://lore.kernel.org/r/629befaa2d05e2922346e58a383886510d6af55a.1659430931.git.christophe.leroy@csgroup.eu
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arch/powerpc/include/asm/atomic.h

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -140,17 +140,18 @@ static __always_inline bool
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arch_atomic_try_cmpxchg_lock(atomic_t *v, int *old, int new)
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{
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int r, o = *old;
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unsigned int eh = IS_ENABLED(CONFIG_PPC64);
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__asm__ __volatile__ (
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"1: lwarx %0,0,%2,%5 # atomic_try_cmpxchg_acquire \n"
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"1: lwarx %0,0,%2,%[eh] # atomic_try_cmpxchg_acquire \n"
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" cmpw 0,%0,%3 \n"
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" bne- 2f \n"
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" stwcx. %4,0,%2 \n"
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" bne- 1b \n"
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"\t" PPC_ACQUIRE_BARRIER " \n"
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"2: \n"
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: "=&r" (r), "+m" (v->counter)
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: "r" (&v->counter), "r" (o), "r" (new), "i" (IS_ENABLED(CONFIG_PPC64) ? 1 : 0)
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: "r" (&v->counter), "r" (o), "r" (new), [eh] "n" (eh)
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: "cr0", "memory");
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if (unlikely(r != o))

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