@@ -829,7 +829,7 @@ static u32 ice_ptp_tmr_cmd_to_port_reg(struct ice_hw *hw,
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/* Certain hardware families share the same register values for the
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* port register and source timer register.
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*/
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- switch (hw -> ptp . phy_model ) {
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+ switch (ice_get_phy_model ( hw ) ) {
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case ICE_PHY_E810 :
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return ice_ptp_tmr_cmd_to_src_reg (hw , cmd ) & TS_CMD_MASK_E810 ;
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default :
@@ -5502,7 +5502,7 @@ void ice_ptp_init_hw(struct ice_hw *hw)
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static int ice_ptp_write_port_cmd (struct ice_hw * hw , u8 port ,
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enum ice_ptp_tmr_cmd cmd )
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{
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- switch (hw -> ptp . phy_model ) {
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+ switch (ice_get_phy_model ( hw ) ) {
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case ICE_PHY_ETH56G :
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return ice_ptp_write_port_cmd_eth56g (hw , port , cmd );
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case ICE_PHY_E82X :
@@ -5567,7 +5567,7 @@ static int ice_ptp_port_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd)
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u32 port ;
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/* PHY models which can program all ports simultaneously */
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- switch (hw -> ptp . phy_model ) {
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+ switch (ice_get_phy_model ( hw ) ) {
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case ICE_PHY_E810 :
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return ice_ptp_port_cmd_e810 (hw , cmd );
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default :
@@ -5646,7 +5646,7 @@ int ice_ptp_init_time(struct ice_hw *hw, u64 time)
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/* PHY timers */
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/* Fill Rx and Tx ports and send msg to PHY */
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- switch (hw -> ptp . phy_model ) {
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+ switch (ice_get_phy_model ( hw ) ) {
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case ICE_PHY_ETH56G :
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err = ice_ptp_prep_phy_time_eth56g (hw ,
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(u32 )(time & 0xFFFFFFFF ));
@@ -5692,7 +5692,7 @@ int ice_ptp_write_incval(struct ice_hw *hw, u64 incval)
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wr32 (hw , GLTSYN_SHADJ_L (tmr_idx ), lower_32_bits (incval ));
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wr32 (hw , GLTSYN_SHADJ_H (tmr_idx ), upper_32_bits (incval ));
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- switch (hw -> ptp . phy_model ) {
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+ switch (ice_get_phy_model ( hw ) ) {
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case ICE_PHY_ETH56G :
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err = ice_ptp_prep_phy_incval_eth56g (hw , incval );
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break ;
@@ -5761,7 +5761,7 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj)
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wr32 (hw , GLTSYN_SHADJ_L (tmr_idx ), 0 );
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wr32 (hw , GLTSYN_SHADJ_H (tmr_idx ), adj );
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- switch (hw -> ptp . phy_model ) {
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+ switch (ice_get_phy_model ( hw ) ) {
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case ICE_PHY_ETH56G :
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err = ice_ptp_prep_phy_adj_eth56g (hw , adj );
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break ;
@@ -5794,7 +5794,7 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj)
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*/
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int ice_read_phy_tstamp (struct ice_hw * hw , u8 block , u8 idx , u64 * tstamp )
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{
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- switch (hw -> ptp . phy_model ) {
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+ switch (ice_get_phy_model ( hw ) ) {
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case ICE_PHY_ETH56G :
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return ice_read_ptp_tstamp_eth56g (hw , block , idx , tstamp );
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case ICE_PHY_E810 :
@@ -5824,7 +5824,7 @@ int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp)
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*/
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int ice_clear_phy_tstamp (struct ice_hw * hw , u8 block , u8 idx )
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{
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- switch (hw -> ptp . phy_model ) {
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+ switch (ice_get_phy_model ( hw ) ) {
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case ICE_PHY_ETH56G :
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return ice_clear_ptp_tstamp_eth56g (hw , block , idx );
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case ICE_PHY_E810 :
@@ -5887,7 +5887,7 @@ static int ice_get_pf_c827_idx(struct ice_hw *hw, u8 *idx)
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*/
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void ice_ptp_reset_ts_memory (struct ice_hw * hw )
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{
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- switch (hw -> ptp . phy_model ) {
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+ switch (ice_get_phy_model ( hw ) ) {
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case ICE_PHY_ETH56G :
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ice_ptp_reset_ts_memory_eth56g (hw );
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break ;
@@ -5916,7 +5916,7 @@ int ice_ptp_init_phc(struct ice_hw *hw)
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/* Clear event err indications for auxiliary pins */
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(void )rd32 (hw , GLTSYN_STAT (src_idx ));
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- switch (hw -> ptp . phy_model ) {
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+ switch (ice_get_phy_model ( hw ) ) {
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case ICE_PHY_ETH56G :
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return ice_ptp_init_phc_eth56g (hw );
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case ICE_PHY_E810 :
@@ -5941,7 +5941,7 @@ int ice_ptp_init_phc(struct ice_hw *hw)
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*/
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int ice_get_phy_tx_tstamp_ready (struct ice_hw * hw , u8 block , u64 * tstamp_ready )
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{
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- switch (hw -> ptp . phy_model ) {
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+ switch (ice_get_phy_model ( hw ) ) {
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case ICE_PHY_ETH56G :
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return ice_get_phy_tx_tstamp_ready_eth56g (hw , block ,
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tstamp_ready );
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