net/mlx4_core: A write memory barrier is sufficient in EQ ci update

Tariq Toukan · davem330 · commit 5e5b9f6272f2 · 2019-01-24T21:54:13.000-08:00
Soften the memory barrier call of mb() by a sufficient wmb() in the
consumer index update of the event queues.

Suggested-by: Eric Dumazet &lt;edumazet@google.com&gt;
Signed-off-by: Tariq Toukan &lt;tariqt@mellanox.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
diff --git a/drivers/net/ethernet/mellanox/mlx4/eq.c b/drivers/net/ethernet/mellanox/mlx4/eq.c
@@ -100,7 +100,7 @@ static void eq_set_ci(struct mlx4_eq *eq, int req_not)
 					       req_not << 31),
 		     eq->doorbell);
 	/* We still want ordering, just not swabbing, so add a barrier */
-	mb();
+	wmb();
 }
 
 static struct mlx4_eqe *get_eqe(struct mlx4_eq *eq, u32 entry, u8 eqe_factor,

Original file line number	Diff line number	Diff line change
`@@ -100,7 +100,7 @@ static void eq_set_ci(struct mlx4_eq *eq, int req_not)`
`100`	`100`	`req_not << 31),`
`101`	`101`	`eq->doorbell);`
`102`	`102`	`/* We still want ordering, just not swabbing, so add a barrier */`
`103`		`- mb();`
	`103`	`+ wmb();`
`104`	`104`	`}`
`105`	`105`
`106`	`106`	`static struct mlx4_eqe get_eqe(struct mlx4_eq eq, u32 entry, u8 eqe_factor,`