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perf auxtrace arm64: Add support for parsing HiSilicon PCIe Trace packet
Add support for using 'perf report --dump-raw-trace' to parse PTT packet. Example usage: Output will contain raw PTT data and its textual representation, such as (8DW format): 0 0 0x5810 [0x30]: PERF_RECORD_AUXTRACE size: 0x400000 offset: 0 ref: 0xa5d50c725 idx: 0 tid: -1 cpu: 0 . . ... HISI PTT data: size 4194304 bytes . 00000000: 00 00 00 00 Prefix . 00000004: 08 20 00 60 Header DW0 . 00000008: ff 02 00 01 Header DW1 . 0000000c: 20 08 00 00 Header DW2 . 00000010: 10 e7 44 ab Header DW3 . 00000014: 2a a8 1e 01 Time . 00000020: 00 00 00 00 Prefix . 00000024: 01 00 00 60 Header DW0 . 00000028: 0f 1e 00 01 Header DW1 . 0000002c: 04 00 00 00 Header DW2 . 00000030: 40 00 81 02 Header DW3 . 00000034: ee 02 00 00 Time .... This patch only add basic parsing support according to the definition of the PTT packet described in Documentation/trace/hisi-ptt.rst. And the fields of each packet can be further decoded following the PCIe Spec's definition of TLP packet. Signed-off-by: Qi Liu <[email protected]> Signed-off-by: Yicong Yang <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Bjorn Helgaas <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: James Clark <[email protected]> Cc: John Garry <[email protected]> Cc: Jonathan Cameron <[email protected]> Cc: Leo Yan <[email protected]> Cc: Lorenzo Pieralisi <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Mathieu Poirier <[email protected]> Cc: Mike Leach <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Qi Liu <[email protected]> Cc: Shameerali Kolothum Thodi <[email protected]> Cc: Shaokun Zhang <[email protected]> Cc: Suzuki Poulouse <[email protected]> Cc: Will Deacon <[email protected]> Cc: Zeng Prime <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
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‎tools/perf/util/Build

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@@ -118,6 +118,8 @@ perf-$(CONFIG_AUXTRACE) += intel-pt.o
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perf-$(CONFIG_AUXTRACE) += intel-bts.o
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perf-$(CONFIG_AUXTRACE) += arm-spe.o
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perf-$(CONFIG_AUXTRACE) += arm-spe-decoder/
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perf-$(CONFIG_AUXTRACE) += hisi-ptt.o
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perf-$(CONFIG_AUXTRACE) += hisi-ptt-decoder/
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perf-$(CONFIG_AUXTRACE) += s390-cpumsf.o
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ifdef CONFIG_LIBOPENCSD

‎tools/perf/util/auxtrace.c

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@@ -52,6 +52,7 @@
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#include "intel-pt.h"
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#include "intel-bts.h"
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#include "arm-spe.h"
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#include "hisi-ptt.h"
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#include "s390-cpumsf.h"
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#include "util/mmap.h"
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@@ -1321,6 +1322,8 @@ int perf_event__process_auxtrace_info(struct perf_session *session,
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err = s390_cpumsf_process_auxtrace_info(event, session);
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break;
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case PERF_AUXTRACE_HISI_PTT:
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err = hisi_ptt_process_auxtrace_info(event, session);
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break;
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case PERF_AUXTRACE_UNKNOWN:
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default:
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return -EINVAL;

‎tools/perf/util/hisi-ptt-decoder/Build

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perf-$(CONFIG_AUXTRACE) += hisi-ptt-pkt-decoder.o

‎tools/perf/util/hisi-ptt-decoder/hisi-ptt-pkt-decoder.c

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// SPDX-License-Identifier: GPL-2.0
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/*
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* HiSilicon PCIe Trace and Tuning (PTT) support
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* Copyright (c) 2022 HiSilicon Technologies Co., Ltd.
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*/
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <endian.h>
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#include <byteswap.h>
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#include <linux/bitops.h>
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#include <stdarg.h>
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#include "../color.h"
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#include "hisi-ptt-pkt-decoder.h"
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/*
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* For 8DW format, the bit[31:11] of DW0 is always 0x1fffff, which can be
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* used to distinguish the data format.
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* 8DW format is like:
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* bits [ 31:11 ][ 10:0 ]
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* |---------------------------------------|-------------------|
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* DW0 [ 0x1fffff ][ Reserved (0x7ff) ]
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* DW1 [ Prefix ]
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* DW2 [ Header DW0 ]
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* DW3 [ Header DW1 ]
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* DW4 [ Header DW2 ]
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* DW5 [ Header DW3 ]
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* DW6 [ Reserved (0x0) ]
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* DW7 [ Time ]
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*
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* 4DW format is like:
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* bits [31:30] [ 29:25 ][24][23][22][21][ 20:11 ][ 10:0 ]
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* |-----|---------|---|---|---|---|-------------|-------------|
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* DW0 [ Fmt ][ Type ][T9][T8][TH][SO][ Length ][ Time ]
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* DW1 [ Header DW1 ]
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* DW2 [ Header DW2 ]
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* DW3 [ Header DW3 ]
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*/
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enum hisi_ptt_8dw_pkt_field_type {
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HISI_PTT_8DW_CHK_AND_RSV0,
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HISI_PTT_8DW_PREFIX,
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HISI_PTT_8DW_HEAD0,
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HISI_PTT_8DW_HEAD1,
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HISI_PTT_8DW_HEAD2,
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HISI_PTT_8DW_HEAD3,
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HISI_PTT_8DW_RSV1,
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HISI_PTT_8DW_TIME,
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HISI_PTT_8DW_TYPE_MAX
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};
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enum hisi_ptt_4dw_pkt_field_type {
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HISI_PTT_4DW_HEAD1,
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HISI_PTT_4DW_HEAD2,
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HISI_PTT_4DW_HEAD3,
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HISI_PTT_4DW_TYPE_MAX
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};
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static const char * const hisi_ptt_8dw_pkt_field_name[] = {
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[HISI_PTT_8DW_PREFIX] = "Prefix",
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[HISI_PTT_8DW_HEAD0] = "Header DW0",
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[HISI_PTT_8DW_HEAD1] = "Header DW1",
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[HISI_PTT_8DW_HEAD2] = "Header DW2",
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[HISI_PTT_8DW_HEAD3] = "Header DW3",
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[HISI_PTT_8DW_TIME] = "Time"
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};
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static const char * const hisi_ptt_4dw_pkt_field_name[] = {
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[HISI_PTT_4DW_HEAD1] = "Header DW1",
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[HISI_PTT_4DW_HEAD2] = "Header DW2",
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[HISI_PTT_4DW_HEAD3] = "Header DW3",
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};
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union hisi_ptt_4dw {
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struct {
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uint32_t format : 2;
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uint32_t type : 5;
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uint32_t t9 : 1;
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uint32_t t8 : 1;
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uint32_t th : 1;
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uint32_t so : 1;
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uint32_t len : 10;
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uint32_t time : 11;
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};
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uint32_t value;
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};
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static void hisi_ptt_print_pkt(const unsigned char *buf, int pos, const char *desc)
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{
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const char *color = PERF_COLOR_BLUE;
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int i;
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printf(".");
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color_fprintf(stdout, color, " %08x: ", pos);
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for (i = 0; i < HISI_PTT_FIELD_LENTH; i++)
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color_fprintf(stdout, color, "%02x ", buf[pos + i]);
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for (i = 0; i < HISI_PTT_MAX_SPACE_LEN; i++)
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color_fprintf(stdout, color, " ");
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color_fprintf(stdout, color, " %s\n", desc);
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}
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static int hisi_ptt_8dw_kpt_desc(const unsigned char *buf, int pos)
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{
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int i;
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for (i = 0; i < HISI_PTT_8DW_TYPE_MAX; i++) {
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/* Do not show 8DW check field and reserved fields */
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if (i == HISI_PTT_8DW_CHK_AND_RSV0 || i == HISI_PTT_8DW_RSV1) {
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pos += HISI_PTT_FIELD_LENTH;
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continue;
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}
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hisi_ptt_print_pkt(buf, pos, hisi_ptt_8dw_pkt_field_name[i]);
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pos += HISI_PTT_FIELD_LENTH;
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}
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return hisi_ptt_pkt_size[HISI_PTT_8DW_PKT];
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}
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static void hisi_ptt_4dw_print_dw0(const unsigned char *buf, int pos)
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{
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const char *color = PERF_COLOR_BLUE;
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union hisi_ptt_4dw dw0;
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int i;
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dw0.value = *(uint32_t *)(buf + pos);
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printf(".");
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color_fprintf(stdout, color, " %08x: ", pos);
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for (i = 0; i < HISI_PTT_FIELD_LENTH; i++)
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color_fprintf(stdout, color, "%02x ", buf[pos + i]);
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for (i = 0; i < HISI_PTT_MAX_SPACE_LEN; i++)
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color_fprintf(stdout, color, " ");
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color_fprintf(stdout, color,
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" %s %x %s %x %s %x %s %x %s %x %s %x %s %x %s %x\n",
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"Format", dw0.format, "Type", dw0.type, "T9", dw0.t9,
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"T8", dw0.t8, "TH", dw0.th, "SO", dw0.so, "Length",
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dw0.len, "Time", dw0.time);
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}
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static int hisi_ptt_4dw_kpt_desc(const unsigned char *buf, int pos)
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{
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int i;
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hisi_ptt_4dw_print_dw0(buf, pos);
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pos += HISI_PTT_FIELD_LENTH;
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for (i = 0; i < HISI_PTT_4DW_TYPE_MAX; i++) {
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hisi_ptt_print_pkt(buf, pos, hisi_ptt_4dw_pkt_field_name[i]);
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pos += HISI_PTT_FIELD_LENTH;
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}
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return hisi_ptt_pkt_size[HISI_PTT_4DW_PKT];
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}
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int hisi_ptt_pkt_desc(const unsigned char *buf, int pos, enum hisi_ptt_pkt_type type)
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{
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if (type == HISI_PTT_8DW_PKT)
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return hisi_ptt_8dw_kpt_desc(buf, pos);
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return hisi_ptt_4dw_kpt_desc(buf, pos);
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}

‎tools/perf/util/hisi-ptt-decoder/hisi-ptt-pkt-decoder.h

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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* HiSilicon PCIe Trace and Tuning (PTT) support
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* Copyright (c) 2022 HiSilicon Technologies Co., Ltd.
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*/
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#ifndef INCLUDE__HISI_PTT_PKT_DECODER_H__
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#define INCLUDE__HISI_PTT_PKT_DECODER_H__
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#include <stddef.h>
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#include <stdint.h>
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#define HISI_PTT_8DW_CHECK_MASK GENMASK(31, 11)
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#define HISI_PTT_IS_8DW_PKT GENMASK(31, 11)
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#define HISI_PTT_MAX_SPACE_LEN 10
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#define HISI_PTT_FIELD_LENTH 4
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enum hisi_ptt_pkt_type {
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HISI_PTT_4DW_PKT,
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HISI_PTT_8DW_PKT,
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HISI_PTT_PKT_MAX
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};
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static int hisi_ptt_pkt_size[] = {
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[HISI_PTT_4DW_PKT] = 16,
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[HISI_PTT_8DW_PKT] = 32,
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};
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int hisi_ptt_pkt_desc(const unsigned char *buf, int pos, enum hisi_ptt_pkt_type type);
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#endif

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