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Merge branch 'dsa-mv88e6xxx-remove-Global-1-setup'
Vivien Didelot says: ==================== net: dsa: mv88e6xxx: remove Global 1 setup The mv88e6xxx driver is still writing arbitrary registers at setup time, e.g. priority override bits. Add ops for them and provide specific setup functions for priority and stats before getting rid of the erroneous mv88e6xxx_g1_setup code, as previously done with Global 2. ==================== Signed-off-by: David S. Miller <[email protected]>
2 parents 23548da + 447b1bb commit 62150df

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4 files changed

+149
-63
lines changed

4 files changed

+149
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lines changed

‎drivers/net/dsa/mv88e6xxx/chip.c

Lines changed: 73 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -995,14 +995,6 @@ static void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds, int port,
995995

996996
}
997997

998-
static int mv88e6xxx_stats_set_histogram(struct mv88e6xxx_chip *chip)
999-
{
1000-
if (chip->info->ops->stats_set_histogram)
1001-
return chip->info->ops->stats_set_histogram(chip);
1002-
1003-
return 0;
1004-
}
1005-
1006998
static int mv88e6xxx_get_regs_len(struct dsa_switch *ds, int port)
1007999
{
10081000
return 32 * sizeof(u16);
@@ -1104,6 +1096,25 @@ static void mv88e6xxx_port_stp_state_set(struct dsa_switch *ds, int port,
11041096
dev_err(ds->dev, "p%d: failed to update state\n", port);
11051097
}
11061098

1099+
static int mv88e6xxx_pri_setup(struct mv88e6xxx_chip *chip)
1100+
{
1101+
int err;
1102+
1103+
if (chip->info->ops->ieee_pri_map) {
1104+
err = chip->info->ops->ieee_pri_map(chip);
1105+
if (err)
1106+
return err;
1107+
}
1108+
1109+
if (chip->info->ops->ip_pri_map) {
1110+
err = chip->info->ops->ip_pri_map(chip);
1111+
if (err)
1112+
return err;
1113+
}
1114+
1115+
return 0;
1116+
}
1117+
11071118
static int mv88e6xxx_devmap_setup(struct mv88e6xxx_chip *chip)
11081119
{
11091120
int target, port;
@@ -2248,45 +2259,16 @@ static int mv88e6xxx_set_ageing_time(struct dsa_switch *ds,
22482259
return err;
22492260
}
22502261

2251-
static int mv88e6xxx_g1_setup(struct mv88e6xxx_chip *chip)
2262+
static int mv88e6xxx_stats_setup(struct mv88e6xxx_chip *chip)
22522263
{
22532264
int err;
22542265

2255-
/* Configure the IP ToS mapping registers. */
2256-
err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_0, 0x0000);
2257-
if (err)
2258-
return err;
2259-
err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_1, 0x0000);
2260-
if (err)
2261-
return err;
2262-
err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_2, 0x5555);
2263-
if (err)
2264-
return err;
2265-
err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_3, 0x5555);
2266-
if (err)
2267-
return err;
2268-
err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_4, 0xaaaa);
2269-
if (err)
2270-
return err;
2271-
err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_5, 0xaaaa);
2272-
if (err)
2273-
return err;
2274-
err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_6, 0xffff);
2275-
if (err)
2276-
return err;
2277-
err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_7, 0xffff);
2278-
if (err)
2279-
return err;
2280-
2281-
/* Configure the IEEE 802.1p priority mapping register. */
2282-
err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IEEE_PRI, 0xfa41);
2283-
if (err)
2284-
return err;
2285-
22862266
/* Initialize the statistics unit */
2287-
err = mv88e6xxx_stats_set_histogram(chip);
2288-
if (err)
2289-
return err;
2267+
if (chip->info->ops->stats_set_histogram) {
2268+
err = chip->info->ops->stats_set_histogram(chip);
2269+
if (err)
2270+
return err;
2271+
}
22902272

22912273
return mv88e6xxx_g1_stats_clear(chip);
22922274
}
@@ -2312,11 +2294,6 @@ static int mv88e6xxx_setup(struct dsa_switch *ds)
23122294
goto unlock;
23132295
}
23142296

2315-
/* Setup Switch Global 1 Registers */
2316-
err = mv88e6xxx_g1_setup(chip);
2317-
if (err)
2318-
goto unlock;
2319-
23202297
err = mv88e6xxx_irl_setup(chip);
23212298
if (err)
23222299
goto unlock;
@@ -2365,6 +2342,10 @@ static int mv88e6xxx_setup(struct dsa_switch *ds)
23652342
if (err)
23662343
goto unlock;
23672344

2345+
err = mv88e6xxx_pri_setup(chip);
2346+
if (err)
2347+
goto unlock;
2348+
23682349
/* Setup PTP Hardware Clock and timestamping */
23692350
if (chip->info->ptp_support) {
23702351
err = mv88e6xxx_ptp_setup(chip);
@@ -2376,6 +2357,10 @@ static int mv88e6xxx_setup(struct dsa_switch *ds)
23762357
goto unlock;
23772358
}
23782359

2360+
err = mv88e6xxx_stats_setup(chip);
2361+
if (err)
2362+
goto unlock;
2363+
23792364
unlock:
23802365
mutex_unlock(&chip->reg_lock);
23812366

@@ -2592,6 +2577,8 @@ static int mv88e6xxx_set_eeprom(struct dsa_switch *ds,
25922577

25932578
static const struct mv88e6xxx_ops mv88e6085_ops = {
25942579
/* MV88E6XXX_FAMILY_6097 */
2580+
.ieee_pri_map = mv88e6085_g1_ieee_pri_map,
2581+
.ip_pri_map = mv88e6085_g1_ip_pri_map,
25952582
.irl_init_all = mv88e6352_g2_irl_init_all,
25962583
.set_switch_mac = mv88e6xxx_g1_set_switch_mac,
25972584
.phy_read = mv88e6185_phy_ppu_read,
@@ -2628,6 +2615,8 @@ static const struct mv88e6xxx_ops mv88e6085_ops = {
26282615

26292616
static const struct mv88e6xxx_ops mv88e6095_ops = {
26302617
/* MV88E6XXX_FAMILY_6095 */
2618+
.ieee_pri_map = mv88e6085_g1_ieee_pri_map,
2619+
.ip_pri_map = mv88e6085_g1_ip_pri_map,
26312620
.set_switch_mac = mv88e6xxx_g1_set_switch_mac,
26322621
.phy_read = mv88e6185_phy_ppu_read,
26332622
.phy_write = mv88e6185_phy_ppu_write,
@@ -2652,6 +2641,8 @@ static const struct mv88e6xxx_ops mv88e6095_ops = {
26522641

26532642
static const struct mv88e6xxx_ops mv88e6097_ops = {
26542643
/* MV88E6XXX_FAMILY_6097 */
2644+
.ieee_pri_map = mv88e6085_g1_ieee_pri_map,
2645+
.ip_pri_map = mv88e6085_g1_ip_pri_map,
26552646
.irl_init_all = mv88e6352_g2_irl_init_all,
26562647
.set_switch_mac = mv88e6xxx_g2_set_switch_mac,
26572648
.phy_read = mv88e6xxx_g2_smi_phy_read,
@@ -2686,6 +2677,8 @@ static const struct mv88e6xxx_ops mv88e6097_ops = {
26862677

26872678
static const struct mv88e6xxx_ops mv88e6123_ops = {
26882679
/* MV88E6XXX_FAMILY_6165 */
2680+
.ieee_pri_map = mv88e6085_g1_ieee_pri_map,
2681+
.ip_pri_map = mv88e6085_g1_ip_pri_map,
26892682
.irl_init_all = mv88e6352_g2_irl_init_all,
26902683
.set_switch_mac = mv88e6xxx_g2_set_switch_mac,
26912684
.phy_read = mv88e6xxx_g2_smi_phy_read,
@@ -2714,6 +2707,8 @@ static const struct mv88e6xxx_ops mv88e6123_ops = {
27142707

27152708
static const struct mv88e6xxx_ops mv88e6131_ops = {
27162709
/* MV88E6XXX_FAMILY_6185 */
2710+
.ieee_pri_map = mv88e6085_g1_ieee_pri_map,
2711+
.ip_pri_map = mv88e6085_g1_ip_pri_map,
27172712
.set_switch_mac = mv88e6xxx_g1_set_switch_mac,
27182713
.phy_read = mv88e6185_phy_ppu_read,
27192714
.phy_write = mv88e6185_phy_ppu_write,
@@ -2747,6 +2742,8 @@ static const struct mv88e6xxx_ops mv88e6131_ops = {
27472742

27482743
static const struct mv88e6xxx_ops mv88e6141_ops = {
27492744
/* MV88E6XXX_FAMILY_6341 */
2745+
.ieee_pri_map = mv88e6085_g1_ieee_pri_map,
2746+
.ip_pri_map = mv88e6085_g1_ip_pri_map,
27502747
.irl_init_all = mv88e6352_g2_irl_init_all,
27512748
.get_eeprom = mv88e6xxx_g2_get_eeprom8,
27522749
.set_eeprom = mv88e6xxx_g2_set_eeprom8,
@@ -2784,6 +2781,8 @@ static const struct mv88e6xxx_ops mv88e6141_ops = {
27842781

27852782
static const struct mv88e6xxx_ops mv88e6161_ops = {
27862783
/* MV88E6XXX_FAMILY_6165 */
2784+
.ieee_pri_map = mv88e6085_g1_ieee_pri_map,
2785+
.ip_pri_map = mv88e6085_g1_ip_pri_map,
27872786
.irl_init_all = mv88e6352_g2_irl_init_all,
27882787
.set_switch_mac = mv88e6xxx_g2_set_switch_mac,
27892788
.phy_read = mv88e6xxx_g2_smi_phy_read,
@@ -2817,6 +2816,8 @@ static const struct mv88e6xxx_ops mv88e6161_ops = {
28172816

28182817
static const struct mv88e6xxx_ops mv88e6165_ops = {
28192818
/* MV88E6XXX_FAMILY_6165 */
2819+
.ieee_pri_map = mv88e6085_g1_ieee_pri_map,
2820+
.ip_pri_map = mv88e6085_g1_ip_pri_map,
28202821
.irl_init_all = mv88e6352_g2_irl_init_all,
28212822
.set_switch_mac = mv88e6xxx_g2_set_switch_mac,
28222823
.phy_read = mv88e6165_phy_read,
@@ -2843,6 +2844,8 @@ static const struct mv88e6xxx_ops mv88e6165_ops = {
28432844

28442845
static const struct mv88e6xxx_ops mv88e6171_ops = {
28452846
/* MV88E6XXX_FAMILY_6351 */
2847+
.ieee_pri_map = mv88e6085_g1_ieee_pri_map,
2848+
.ip_pri_map = mv88e6085_g1_ip_pri_map,
28462849
.irl_init_all = mv88e6352_g2_irl_init_all,
28472850
.set_switch_mac = mv88e6xxx_g2_set_switch_mac,
28482851
.phy_read = mv88e6xxx_g2_smi_phy_read,
@@ -2877,6 +2880,8 @@ static const struct mv88e6xxx_ops mv88e6171_ops = {
28772880

28782881
static const struct mv88e6xxx_ops mv88e6172_ops = {
28792882
/* MV88E6XXX_FAMILY_6352 */
2883+
.ieee_pri_map = mv88e6085_g1_ieee_pri_map,
2884+
.ip_pri_map = mv88e6085_g1_ip_pri_map,
28802885
.irl_init_all = mv88e6352_g2_irl_init_all,
28812886
.get_eeprom = mv88e6xxx_g2_get_eeprom16,
28822887
.set_eeprom = mv88e6xxx_g2_set_eeprom16,
@@ -2916,6 +2921,8 @@ static const struct mv88e6xxx_ops mv88e6172_ops = {
29162921

29172922
static const struct mv88e6xxx_ops mv88e6175_ops = {
29182923
/* MV88E6XXX_FAMILY_6351 */
2924+
.ieee_pri_map = mv88e6085_g1_ieee_pri_map,
2925+
.ip_pri_map = mv88e6085_g1_ip_pri_map,
29192926
.irl_init_all = mv88e6352_g2_irl_init_all,
29202927
.set_switch_mac = mv88e6xxx_g2_set_switch_mac,
29212928
.phy_read = mv88e6xxx_g2_smi_phy_read,
@@ -2951,6 +2958,8 @@ static const struct mv88e6xxx_ops mv88e6175_ops = {
29512958

29522959
static const struct mv88e6xxx_ops mv88e6176_ops = {
29532960
/* MV88E6XXX_FAMILY_6352 */
2961+
.ieee_pri_map = mv88e6085_g1_ieee_pri_map,
2962+
.ip_pri_map = mv88e6085_g1_ip_pri_map,
29542963
.irl_init_all = mv88e6352_g2_irl_init_all,
29552964
.get_eeprom = mv88e6xxx_g2_get_eeprom16,
29562965
.set_eeprom = mv88e6xxx_g2_set_eeprom16,
@@ -2990,6 +2999,8 @@ static const struct mv88e6xxx_ops mv88e6176_ops = {
29902999

29913000
static const struct mv88e6xxx_ops mv88e6185_ops = {
29923001
/* MV88E6XXX_FAMILY_6185 */
3002+
.ieee_pri_map = mv88e6085_g1_ieee_pri_map,
3003+
.ip_pri_map = mv88e6085_g1_ip_pri_map,
29933004
.set_switch_mac = mv88e6xxx_g1_set_switch_mac,
29943005
.phy_read = mv88e6185_phy_ppu_read,
29953006
.phy_write = mv88e6185_phy_ppu_write,
@@ -3129,6 +3140,8 @@ static const struct mv88e6xxx_ops mv88e6191_ops = {
31293140

31303141
static const struct mv88e6xxx_ops mv88e6240_ops = {
31313142
/* MV88E6XXX_FAMILY_6352 */
3143+
.ieee_pri_map = mv88e6085_g1_ieee_pri_map,
3144+
.ip_pri_map = mv88e6085_g1_ip_pri_map,
31323145
.irl_init_all = mv88e6352_g2_irl_init_all,
31333146
.get_eeprom = mv88e6xxx_g2_get_eeprom16,
31343147
.set_eeprom = mv88e6xxx_g2_set_eeprom16,
@@ -3208,6 +3221,8 @@ static const struct mv88e6xxx_ops mv88e6290_ops = {
32083221

32093222
static const struct mv88e6xxx_ops mv88e6320_ops = {
32103223
/* MV88E6XXX_FAMILY_6320 */
3224+
.ieee_pri_map = mv88e6085_g1_ieee_pri_map,
3225+
.ip_pri_map = mv88e6085_g1_ip_pri_map,
32113226
.irl_init_all = mv88e6352_g2_irl_init_all,
32123227
.get_eeprom = mv88e6xxx_g2_get_eeprom16,
32133228
.set_eeprom = mv88e6xxx_g2_set_eeprom16,
@@ -3244,6 +3259,8 @@ static const struct mv88e6xxx_ops mv88e6320_ops = {
32443259

32453260
static const struct mv88e6xxx_ops mv88e6321_ops = {
32463261
/* MV88E6XXX_FAMILY_6320 */
3262+
.ieee_pri_map = mv88e6085_g1_ieee_pri_map,
3263+
.ip_pri_map = mv88e6085_g1_ip_pri_map,
32473264
.irl_init_all = mv88e6352_g2_irl_init_all,
32483265
.get_eeprom = mv88e6xxx_g2_get_eeprom16,
32493266
.set_eeprom = mv88e6xxx_g2_set_eeprom16,
@@ -3278,6 +3295,8 @@ static const struct mv88e6xxx_ops mv88e6321_ops = {
32783295

32793296
static const struct mv88e6xxx_ops mv88e6341_ops = {
32803297
/* MV88E6XXX_FAMILY_6341 */
3298+
.ieee_pri_map = mv88e6085_g1_ieee_pri_map,
3299+
.ip_pri_map = mv88e6085_g1_ip_pri_map,
32813300
.irl_init_all = mv88e6352_g2_irl_init_all,
32823301
.get_eeprom = mv88e6xxx_g2_get_eeprom8,
32833302
.set_eeprom = mv88e6xxx_g2_set_eeprom8,
@@ -3316,6 +3335,8 @@ static const struct mv88e6xxx_ops mv88e6341_ops = {
33163335

33173336
static const struct mv88e6xxx_ops mv88e6350_ops = {
33183337
/* MV88E6XXX_FAMILY_6351 */
3338+
.ieee_pri_map = mv88e6085_g1_ieee_pri_map,
3339+
.ip_pri_map = mv88e6085_g1_ip_pri_map,
33193340
.irl_init_all = mv88e6352_g2_irl_init_all,
33203341
.set_switch_mac = mv88e6xxx_g2_set_switch_mac,
33213342
.phy_read = mv88e6xxx_g2_smi_phy_read,
@@ -3350,6 +3371,8 @@ static const struct mv88e6xxx_ops mv88e6350_ops = {
33503371

33513372
static const struct mv88e6xxx_ops mv88e6351_ops = {
33523373
/* MV88E6XXX_FAMILY_6351 */
3374+
.ieee_pri_map = mv88e6085_g1_ieee_pri_map,
3375+
.ip_pri_map = mv88e6085_g1_ip_pri_map,
33533376
.irl_init_all = mv88e6352_g2_irl_init_all,
33543377
.set_switch_mac = mv88e6xxx_g2_set_switch_mac,
33553378
.phy_read = mv88e6xxx_g2_smi_phy_read,
@@ -3385,6 +3408,8 @@ static const struct mv88e6xxx_ops mv88e6351_ops = {
33853408

33863409
static const struct mv88e6xxx_ops mv88e6352_ops = {
33873410
/* MV88E6XXX_FAMILY_6352 */
3411+
.ieee_pri_map = mv88e6085_g1_ieee_pri_map,
3412+
.ip_pri_map = mv88e6085_g1_ip_pri_map,
33883413
.irl_init_all = mv88e6352_g2_irl_init_all,
33893414
.get_eeprom = mv88e6xxx_g2_get_eeprom16,
33903415
.set_eeprom = mv88e6xxx_g2_set_eeprom16,

‎drivers/net/dsa/mv88e6xxx/chip.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -294,6 +294,9 @@ struct mv88e6xxx_mdio_bus {
294294
};
295295

296296
struct mv88e6xxx_ops {
297+
int (*ieee_pri_map)(struct mv88e6xxx_chip *chip);
298+
int (*ip_pri_map)(struct mv88e6xxx_chip *chip);
299+
297300
/* Ingress Rate Limit unit (IRL) operations */
298301
int (*irl_init_all)(struct mv88e6xxx_chip *chip, int port);
299302

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